并行输入/串行输出移位寄存器的清除和时钟输入是什么意思?我正在分析该代码:
Entity shiftop is
port(clk,c :in bit;x :in bit_vector(7 downto 0);tx:out bit );
end entity;
architecture shift_arch of shiftop is
signal shift :bit_vector(7 downto 0):="00000000";
begin
shift<=x when (c='1' and c'event) else
'0'& shift (7 downto 1) when(clk='1' and clk'event) else
shift;
tx<=shift(0);
end architecture;
我不理解的是那个“ c”的含义,我想它是类似于CLEAR输入或将输入x加载到寄存器中的东西。