Verilog错误:Xst:528:多源信号;此信号连接到多个驱动程序

时间:2016-08-31 19:26:40

标签: syntax-error verilog processor

这是处理器的执行块。大多数代码仅供参考。

module Execution_Block(A, B, data_in, op_dec, flag_ex, ans_ex, data_out,
                mem_en_dec, mem_rw_dec, mem_mux_sel_dec, RW_dec, clk, reset,
                B_Bypass, mem_en_ex, mem_rw_ex, mem_mux_sel_ex, RW_ex);

         //INPUTS
         input [7:0] A, B, data_in;
         input clk, reset, mem_en_dec, mem_rw_dec, mem_mux_sel_dec;
         input [4:0] RW_dec;
         input [4:0] op_dec;

         //OUTPUTS
         output [3:0] flag_ex;
         output reg mem_en_ex, mem_rw_ex, mem_mux_sel_ex;
         output reg [7:0] B_Bypass, ans_ex, data_out;
         output reg [4:0] RW_ex; 

         //WIRES
         wire [7:0] ans_temp, data_out_buff;
         wire [7:0] W0, W1,W2, W3, W4, W5, W6, W7, W8, W9, W10, W11, W12,                                W13, W14, W15, W16, W17, W18, W19, W20,
         W21, W22, W23, W24, W25, W26, W27, W28;
         wire P;
         wire [3:0]flag_temp;
         wire [3:0]flag_hold_prev;

        //ALU
        assign W0  = (op_dec == 5'b00000) ? (A+B)       : W1;       //ADD
        assign W1  = (op_dec == 5'b00001) ? (A+(~B+1))  : W2;       //SUB
        assign W2  = (op_dec == 5'b00010) ? (B)         : W3;       //MOV
        assign W3  = (op_dec == 5'b00100) ? (A&B)       : W4;       //AND
        assign W4  = (op_dec == 5'b00101) ? (A|B)          : W5;        //OR
        assign W5  = (op_dec == 5'b00110) ? (A^B)       : W6;       //XOR
        assign W6  = (op_dec == 5'b00111) ? (~B)        : W7;       //NOR
        assign W7  = (op_dec == 5'b01000) ? (A+B)       : W8;       //ADI
        assign W8  = (op_dec == 5'b01001) ? (A+(~B+1))  : W9;       //SBI
        assign W9  = (op_dec == 5'b01010) ? (B)         : W10;  //NVI
        assign W10 = (op_dec == 5'b01100) ? (A&B)      : W11;   //ANI
        assign W11 = (op_dec == 5'b01101) ? (A|B)      : W12;   //ORI
        assign W12 = (op_dec == 5'b01110) ? (A^B)      : W13;   //XRI
        assign W13 = (op_dec == 5'b01111) ? (~B)        : W14;  //NTI
        assign W14 = (op_dec == 5'b10000) ? (ans_temp)  : W15;  //RET
        assign W15 = (op_dec == 5'b10001) ? (ans_temp)  : W16;  //HLT
        assign W16 = (op_dec == 5'b10100) ? (A)         : W17;  //LD
        assign W17 = (op_dec == 5'b10101) ? (A)         : W18;  //ST
        assign W18 = (op_dec == 5'b10110) ? (data_in)   : W19;  //IN
        assign W19 = (op_dec == 5'b00111) ? (ans_temp)  : W20;  //OUT
        assign W20 = (op_dec == 5'b11000) ? (ans_temp)  : W21;  //JMP
        assign W21 = (op_dec == 5'b11001) ? (A<<B)      : W22;  //LS
        assign W22 = (op_dec == 5'b11011) ? (A>>B)      : W23;  //RS
        assign W23 = (op_dec == 5'b11011) ? 
                ((A[2:0]==3'b000) ? B : 
                ((A[2:0]==3'b001) ? {B[7], B[7:1]} : 
                ((A[2:0]==3'b010) ? {B[7], B[7],  B[7:2]} : 
                ((A[2:0]==3'b011) ? {B[7], B[7], B[7], B[7:3]} : 
                ((A[2:0]==3'b100) ? {B[7], B[7], B[7], B[7], B[7:4]} : 
                ((A[2:0]==3'b101) ? {B[7], B[7], B[7], B[7], B[7], B[7:5]} : 
                ((A[2:0]==3'b110) ? {B[7], B[7], B[7], B[7], B[7], B[7], B[7:6]} : 
                ((A[2:0]==3'b111) ? {B[7], B[7], B[7], B[7], B[7], B[7], B[7], B[7]}: 0)))))))) : W24;  //RSA

        assign W24 = (op_dec == 5'b11100) ? (ans_temp)  : W25;          //JC
        assign W25 = (op_dec == 5'b11101) ? (ans_temp)  : W26;      //JNC
        assign W26 = (op_dec == 5'b11110) ? (ans_temp)  : W27;          //JZ
        assign W27 = (op_dec == 5'b11111) ? (ans_temp)  : W28;      //JNZ
        assign W28 = 8'b00000000;

        //ANSWER TEMP
        assign ans_temp = ((op_dec == 5'b00000) ? W0 :              //ADD
                    ((op_dec == 5'b00001) ? W1 :                    //SUB
                    ((op_dec == 5'b00010) ? W2 :                    //MOV
                    ((op_dec == 5'b00100) ? W3 :                    //AND
                    ((op_dec == 5'b00101) ? W4 :                    //OR
                    ((op_dec == 5'b00110) ? W5 :                    //XOR
                    ((op_dec == 5'b00111) ? W6 :                    //NOT
                    ((op_dec == 5'b01000) ? W7 :                    //ADI
                    ((op_dec == 5'b01001) ? W8 :                    //SBI
                    ((op_dec == 5'b01010) ? W9 :                    //MVI
                    ((op_dec == 5'b01100) ? W10 :                   //ANI
                    ((op_dec == 5'b01101) ? W11 :                   //ORI
                    ((op_dec == 5'b01110) ? W12 :                   //XRI
                    ((op_dec == 5'b01111) ? W13 :                   //NTI
                    ((op_dec == 5'b10000) ? W14 :                   //RET
                    ((op_dec == 5'b10001) ? W15 :                   //HLT
                    ((op_dec == 5'b10100) ? W16 :                   //LD
                    ((op_dec == 5'b10101) ? W17 :                   //ST
                    ((op_dec == 5'b10110) ? W18 :                   //IN
                    ((op_dec == 5'b10111) ? W19 :                   //OUT
                    ((op_dec == 5'b11000) ? W20 :                   //JMP
                    ((op_dec == 5'b11001) ? W21 :                   //LS
                    ((op_dec == 5'b11010) ? W22 :                   //RS
                    ((op_dec == 5'b11011) ? W23 :                   //RSA
                    ((op_dec == 5'b11100) ? W24 :                   //JC
                    ((op_dec == 5'b11101) ? W25 :                   //JNC
                    ((op_dec == 5'b11110) ? W26 :                   //JZ
                    ((op_dec == 5'b11111) ? W27 : W28))))))))))))))))))))))))))));              //JNZ

    //FLAGS
    //CARRY FLAG                    
    assign flag_temp[0] = (A[7]&B[7])|| (A[6]&B[6])|| (A[5]&B[5])|| (A[4]&B[4])|| 
                         (A[3]&B[3])|| (A[2]&B[2])|| (A[1]&B[1])|| (A[0]&B[0]);

  //ZERO FLAG
  assign flag_temp[1] = (ans_temp)? 1 : 0;

  //OVERFLOW FLAG
  assign flag_temp[2] = (A[7]&B[7]) ^ (A[6]&B[6]);

 //PARITY FLAG
 //PARITY GENERATOR
 assign P = ans_temp[7] ^ ans_temp[6] ^ ans_temp[5] ^ ans_temp[4] ^ 
          ans_temp[3] ^ ans_temp[2] ^ ans_temp[1] ^ ans_temp[0];

 //PARITY CHECKER             
 assign flag_temp[3] = ans_temp[7] ^ ans_temp[6] ^ ans_temp[5] ^ ans_temp[4] ^ 
                         ans_temp[3] ^ ans_temp[2] ^ ans_temp[1] ^ ans_temp[0] ^ P;
  

Xst有一个错误:528 - 单元(Execution_Block)上的多源信号(flag_ex)此信号连接到多个驱动器。

//ALL FLAGS AFFECTED: flag_temp[3:0]         
//PARITY AND ZERO AFFECTED, RESET OTHER FLAGS: {flag_temp[3], 1'b0, flag_temp[1], 1'b0}      
//RESET ALL FLAGS: 4'b0000          
//HOLD PREVIOUS FLAG: flag_hold_prev    


assign flag_temp= ((op_dec == 5'b00000) ? flag_temp[3:0] :          //ADD
                    ((op_dec == 5'b00001) ? flag_temp[3:0] :        //SUB
                    ((op_dec == 5'b00010) ? {flag_temp[3], 1'b0, flag_temp[1], 1'b0} :                          //MOV
                    ((op_dec == 5'b00100) ? {flag_temp[3], 1'b0, flag_temp[1], 1'b0} :                          //AND
                    ((op_dec == 5'b00101) ? {flag_temp[3], 1'b0, flag_temp[1], 1'b0} :                          //OR
                    ((op_dec == 5'b00110) ? {flag_temp[3], 1'b0, flag_temp[1], 1'b0} :                          //XOR
                    ((op_dec == 5'b00111) ? {flag_temp[3], 1'b0, flag_temp[1], 1'b0} :                          //NOT
                    ((op_dec == 5'b01000) ? flag_temp[3:0] :                            //ADI
                    ((op_dec == 5'b01001) ? flag_temp[3:0] :                            //SBI
                    ((op_dec == 5'b01010) ? {flag_temp[3], 1'b0, flag_temp[1], 1'b0} :                          //MVI
                    ((op_dec == 5'b01100) ? {flag_temp[3], 1'b0, flag_temp[1], 1'b0} :                      //ANI
                    ((op_dec == 5'b01101) ? {flag_temp[3], 1'b0, flag_temp[1], 1'b0} :                      //ORI
                    ((op_dec == 5'b01110) ? {flag_temp[3], 1'b0, flag_temp[1], 1'b0} :                      //XRI
                    ((op_dec == 5'b01111) ? {flag_temp[3], 1'b0, flag_temp[1], 1'b0} :                      //NTI
                    ((op_dec == 5'b10000) ? 4'b0000 :                       //RET
                    ((op_dec == 5'b10001) ? 4'b0000 :                       //HLT
                    ((op_dec == 5'b10100) ? flag_hold_prev :                        //LD
                    ((op_dec == 5'b10101) ? flag_hold_prev :                        //ST
                    ((op_dec == 5'b10110) ? {flag_temp[3], 1'b0, flag_temp[1], 1'b0} :                      //IN
                    ((op_dec == 5'b10111) ? flag_hold_prev :                        //OUT
                    ((op_dec == 5'b11000) ? flag_hold_prev :                        //JMP
                    ((op_dec == 5'b11001) ? {flag_temp[3], 1'b0, flag_temp[1], 1'b0} :                      //LS
                    ((op_dec == 5'b11010) ? {flag_temp[3], 1'b0, flag_temp[1], 1'b0} :                      //RS
                    ((op_dec == 5'b11011) ? {flag_temp[3], 1'b0, flag_temp[1], 1'b0} :                      //RSA
                    ((op_dec == 5'b11100) ? flag_hold_prev :                        //JC
                    ((op_dec == 5'b11101) ? flag_hold_prev :                        //JNC
                    ((op_dec == 5'b11110) ? flag_hold_prev :                        //JZ
                    ((op_dec == 5'b11111) ? flag_hold_prev : W28))))))))))))))))))))))))))));               //JNZ

assign flag_ex = flag_temp;
assign flag_hold_prev = flag_ex;
  

即使flag_ex只分配了一次。

assign data_out_buff = (op_dec == 5'b10111) ? A : W28;

//REGISTER
always@(posedge clk)
begin
if(reset == 1'b1)                               //RESET SIGNAL IS ON
    begin
            ans_ex <= 8'b00000000;
            data_out <= 8'b00000000;
            mem_en_ex <= 1'b0;
            mem_rw_ex <=    1'b0;
            mem_mux_sel_ex <= 1'b0;
            RW_ex <= 5'b00000;
            B_Bypass <= 8'b00000000;
    end
else                                                //RESET SIGNAL IS OFF
    begin
            ans_ex <= ans_temp;
            data_out <= data_out_buff;
            mem_en_ex <= mem_en_dec;
            mem_rw_ex <=    mem_rw_dec;
            mem_mux_sel_ex <= mem_mux_sel_dec;
            RW_ex <= RW_dec;
            B_Bypass <= B;
    end
   end  
   endmodule

1 个答案:

答案 0 :(得分:0)

flag_temp分配在两个单独的assign语句中。一旦分配了各个位,并且下次整个总线。这将导致合成器出现问题。

您可能会看到此错误,因为flag_temp有多个驱动程序,而这些驱动程序又分配给flag_ex。

//FLAGS
    //CARRY FLAG
    assign flag_temp[0] = (A[7]&B[7])|| (A[6]&B[6])|| (A[5]&B[5])|| (A[4]&B[4])||
                         (A[3]&B[3])|| (A[2]&B[2])|| (A[1]&B[1])|| (A[0]&B[0]);

  //ZERO FLAG
  assign flag_temp[1] = (ans_temp)? 1 : 0;

  //OVERFLOW FLAG
  assign flag_temp[2] = (A[7]&B[7]) ^ (A[6]&B[6]);

 //PARITY FLAG
 //PARITY GENERATOR
 assign P = ans_temp[7] ^ ans_temp[6] ^ ans_temp[5] ^ ans_temp[4] ^
          ans_temp[3] ^ ans_temp[2] ^ ans_temp[1] ^ ans_temp[0];

 //PARITY CHECKER
 assign flag_temp[3] = ans_temp[7] ^ ans_temp[6] ^ ans_temp[5] ^ ans_temp[4] ^
                         ans_temp[3] ^ ans_temp[2] ^ ans_temp[1] ^ ans_temp[0] ^ P;

2ns实例。

assign flag_temp= ((op_dec == 5'b00000) ? fl ....