Question

我对双端口RAM有点困惑，我的目标是写入和读取数据。我想写数据。在某个地址上将是128，其余的地址将只是0.它是否正常工作，因为我不确定那些案例陈述是否有用？如何在此RAM中正确写入数据？我正在阅读this文章我想我需要真正的双端口Ram.I有下一个代码。

library ieee;
use ieee.std_logic_1164.all;
entity true_dual_port_ram_single_clock is
 generic (
  DATA_WIDTH : natural := 8;
  ADDR_WIDTH : natural := 6
 );
 port (
  clk : in std_logic;
    addr_a : in natural range 0 to 2**ADDR_WIDTH - 1;
  addr_b : in natural range 0 to 2**ADDR_WIDTH - 1;
  data_a : in std_logic_vector((DATA_WIDTH-1) downto 0);
  data_b : in std_logic_vector((DATA_WIDTH-1) downto 0);
  we_a : in std_logic := '1';
  we_b : in std_logic := '1';
  q_a : out std_logic_vector((DATA_WIDTH -1) downto 0);
  q_b : out std_logic_vector((DATA_WIDTH -1) downto 0)
 );
end true_dual_port_ram_single_clock;
architecture rtl of true_dual_port_ram_single_clock is
 -- Build a 2-D array type for the RAM
 subtype word_t is std_logic_vector((DATA_WIDTH-1) downto 0);
 type memory_t is array((2**ADDR_WIDTH - 1) downto 0) of word_t;
 -- Declare the RAM signal.
 shared variable ram : memory_t;
  begin
 process(clk)
 begin
 if(rising_edge(clk)) then -- Port A
  if(we_a = '1') then


    ram(addr_a) := data_a;

   -- Read-during-write on the same port returns NEW data
            case addr_a is
            when 0 => 
                 q_a <= "10000000";
            when 16 => 
                 q_a <= "10000000";
            when others => 
                 q_a <="00000000";
        end case;
   q_a <= data_a;
  else
   -- Read-during-write on the mixed port returns OLD data
            case addr_a is
            when 0 => 
                 q_a <= "10000000";
            when 16 => 
                 q_a <= "10000000";
            when others => 
                 q_a <="00000000";
        end case;
   q_a <= ram(addr_a);
  end if;
 end if;
 end process;
 process(clk)
 begin
 if(rising_edge(clk)) then -- Port B
  if(we_b = '1') then
            case addr_a is
            when 0 => 
                 q_b <= "10000000";
            when 16 => 
                 q_b <= "10000000";
            when others => 
                 q_b <="00000000";
        end case;
   ram(addr_b) := data_b;
   -- Read-during-write on the same port returns NEW data
   q_b <= data_b;
  else
   -- Read-during-write on the mixed port returns OLD data
           if(we_b = '1') then
            case addr_b is
            when 0 => 
                 q_b <= "10000000";
            when 16 => 
                 q_b <= "10000000";
            when others => 
                 q_b <="00000000";
        end case;
   q_b <= ram(addr_b);
  end if;
 end if;
  end if;
 end process;
end rtl;

双端口RAM写入数据

0 个答案: