我有一系列信号。当作为“选择器”的信号等于单元格编号时,我想写入数组中的适当单元格。为了节省写入和代码行,我在生成循环中生成赋值:
read_data_signals_gen: for i in 0 to (CAU_num -1) generate
v_direction_sig(i)(0) <= DATA_IN when (chosen_flow_sig = i) and (read_state = st_read_v_direction_0) else
v_direction_sig(i)(0);
v_direction_sig(i)(1) <= DATA_IN when (chosen_flow_sig = i) and (read_state = st_read_v_direction_1) else
v_direction_sig(i)(1);
v_direction_sig(i)(2) <= DATA_IN when (chosen_flow_sig = i) and (read_state = st_read_v_direction_2) else
v_direction_sig(i)
...
end generation read_data_signals_gen;
chosen_flow_sig是std_logic_vector (1 downto 0)
,获取"00"
,"01"
,"10"
或"11"
来表示单元格的编号,CAU_num
是integer
常量等于4.如何在when
语句中创建比较,以便整数等于其二进制转换?
还有一个相关的问题。有没有办法执行以下代码:
type BitArray is array (natural range <>) of std_logic;
sel_sig : std_logic_vector(0 to 1);
bit_arr : BitArray(0 to 3)
sel_sig <= "00"
bit_arr(sel_sig) <= '1' -- HOW TO PERFORM THIS?
答案 0 :(得分:4)
您可能正在寻找
to_integer(unsigned(sel_sig))
e.g。
bit_arr(to_integer(unsigned(sel_sig))) <= '1'
或
if to_integer(unsigned(sel_sig))=12 then ...
答案 1 :(得分:2)
如果chosen_flow_sig
表示数字,请使用数字类型(例如unsigned
或integer
)。如果你使用std_logic_vector
,你会给自己带来痛苦,而你却不需要!