Question

任务更大，但我被困在将带符号的8位两个补码转换为十进制。这是一些代码：

entity example is
    Port ( switches : in STD_LOGIC_VECTOR (7 downto 0) );
end example;
signal integer_value : integer;

我正试图将输入转换为十进制的逻辑

integer_value <= to_integer(unsigned(switches));

integer_value最终为零或最小值（-2147483648）。输入示例为“ 01101111”。

Answer 1

使用signed，而不是unsigned，因此：

integer_value <= to_integer(signed(switches));

请考虑制作一个小的试验台来对结构进行试验，这样就可以隔离问题，因为听起来问题似乎在设计的其他地方。简单的测试平台可能像：

entity mdl_tb is
end entity;

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

architecture sim of mdl_tb is
  signal switches      : std_logic_vector(7 downto 0);
  signal integer_value : integer;
begin

  integer_value <= to_integer(signed(switches));

  process is
  begin
    switches <= "00000000"; wait for 10 ns; report integer'image(integer_value);
    switches <= "11111111"; wait for 10 ns; report integer'image(integer_value);
    switches <= "10000000"; wait for 10 ns; report integer'image(integer_value);
    switches <= "01101111"; wait for 10 ns; report integer'image(integer_value);
    wait;
  end process;

end architecture;

并输出：

# ** Note: 0
#    Time: 10 ns  Iteration: 0  Instance: /mdl_tb
# ** Note: -1
#    Time: 20 ns  Iteration: 0  Instance: /mdl_tb
# ** Note: -128
#    Time: 30 ns  Iteration: 0  Instance: /mdl_tb
# ** Note: 111
#    Time: 40 ns  Iteration: 0  Instance: /mdl_tb

将8位两个补码有符号数转换为十进制

1 个答案: