我在vhdl中做了一个简单的ula。在sum操作中得到消息错误
错误:
Error (10500): VHDL syntax error at rjr_neander.vhd(30) near text "for"; expecting "end", or "(", or an identifier ("for" is a reserved keyword), or a concurrent statement
Error (10500): VHDL syntax error at rjr_neander.vhd(34) near text "loop"; expecting ";", or an identifier ("loop" is a reserved keyword), or "architecture"
代码:
entity ula is
port(
inputA, inputB: in bit_vector(0 to 7);
output: out bit_vector(0 to 7)
);
end ula;
architecture sum8bits of ula is
signal cout : bit_vector(0 to 6);
begin
-- Half adder do bit 0
output(0) <= inputA(0) xor inputB(0);
cout(0) <= inputA(0) and inputB(0);
for indice in 1 to 7 loop
-- iteracao para fazer o full adder dos 7 bits restantes
output(indice) <= inputA(indice) xor inputB(indice) xor cout(indice-1);
cout(indice) <= (inputA(indice) and inputB(indice)) or (inputA(indice) and cout(indice-1)) or (inputB(indice) and cout(indice-1));
end loop;
end sum8bits;
我的错误是什么?