-- Code your design here
library IEEE;
use IEEE.std_logic_1164.all;
entity encoder8_3 is
port(
din : in STD_LOGIC_VECTOR(7 downto 0);
dout : out INTEGER RANGE 0 TO 15
);
end encoder8_3;
architecture encoder8_3_arc of encoder8_3 is
begin
dout <= "0" when (din="10000000") else
"1" when (din="01000000") else
"2" when (din="00100000") else
"3" when (din="00010000") else
"4" when (din="00001000") else
"5" when (din="00000100") else
"6" when (din="00000010") else
"7";
end encoder8_3_arc;
这段代码会运行吗?我想返回整数来代替二进制等价。
答案 0 :(得分:1)
为什么这段代码不会编译?
因为VHDL中的整数文字没有引号:
library IEEE;
use IEEE.std_logic_1164.all;
entity encoder8_3 is
port(
din : in STD_LOGIC_VECTOR(7 downto 0);
dout : out INTEGER RANGE 0 TO 15
);
end encoder8_3;
architecture encoder8_3_arc of encoder8_3 is
begin
dout <= 0 when (din="10000000") else
1 when (din="01000000") else
2 when (din="00100000") else
3 when (din="00010000") else
4 when (din="00001000") else
5 when (din="00000100") else
6 when (din="00000010") else
7;
end encoder8_3_arc;
答案 1 :(得分:1)
你必须删除整数值周围的引号:
dout <= 0 when (din="10000000") else
1 when (din="01000000") else
2 when (din="00100000") else
3 when (din="00010000") else
4 when (din="00001000") else
5 when (din="00000100") else
6 when (din="00000010") else
7;
在这里运行一个简单的测试平台:http://www.edaplayground.com/x/5bwv我得到了以下输出: