为什么我的Xilinx ISE模拟器崩溃了?

时间:2015-05-08 11:13:20

标签: vhdl xilinx-ise

我正在尝试为浮点数制作一个ALU。这是我的代码,每当我尝试运行模拟测试平台时,模拟器崩溃说明这一点:

  

isim_beh.exe已停止工作

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity fp is
port( in_one:in std_logic_vector(31 downto 0);
        in_two:in std_logic_vector(31 downto 0);
        select_line:in std_logic_vector(2 downto 0);
        output:out std_logic_vector(31 downto 0));
end fp;

architecture Behavioral of fp is
signal bb:std_logic_vector(31 downto 0);
signal j,k,l:std_logic_vector(31 downto 0);
component floating 
port (ina,inb:in std_logic_vector(31 downto 0);
        sss:in std_logic_vector(2 downto 0);
        outb:out std_logic_vector(31 downto 0));
end component;
component adder
port( a:in std_logic_vector(31 downto 0);
        b:in std_logic_vector(31 downto 0);
        sss:in std_logic_vector(2 downto 0);
        oo:out std_logic_vector(31 downto 0));
end component;
begin
u1:floating port map(in_one,in_two,select_line,j); --When ss=10 then     multiply is chosen
u2:adder port map(in_one,in_two,select_line,k);     --When ss=00 then addition is chosen and when ss=01 then subtraction is chosen
output<=(not in_one) when select_line="100" else
          (in_one and in_two) when select_line="101" else
          (in_one or in_two) when select_line="110" else
          j+k;
end Behavioral;

PS Floating是乘法的组件。加法器是加法和减法的组成部分。

0 个答案:

没有答案