进行功耗分析,我第一次尝试生成.vcd但是收到错误。请告诉我如何删除它
module dct_test;
// Inputs
reg [6:0] x0;
reg [6:0] x1;
reg [6:0] x2;
reg [6:0] x3;
// Outputs
wire [9:0] y0;
wire [9:0] y1;
wire [9:0] y2;
wire [9:0] y3;
// Instantiate the Unit Under Test (UUT)
dct uut (
.x0(x0),
.x1(x1),
.x2(x2),
.x3(x3),
.y0(y0),
.y1(y1),
.y2(y2),
.y3(y3)
);
initial begin
// Initialize Inputs
x0 = 0000001;
x1 = 0000001;
x2 = 0000001;
x3 = 0000001;
end
// Wait 100 ns for global reset to finish
initial
dumpfile("dct.vcd");
initial
dumpvars();
// Add stimulus here
endmodule
我收到的错误是: 错误:HDLCompiler:69 - “F:/ xillinx program / dct_multiplier / dct_test.v”第62行:未声明。
错误:HDLCompiler:69 - “F:/ xillinx program / dct_multiplier / dct_test.v”第64行:未声明。
错误:模拟器:778 - 图书馆工作中顶级Verilog设计单元的静态细化