我目前正在为我的微电子类设计ARV，需要在PIC18f45k20上实现USART。到目前为止，我已经得到它在高优先级中断接收RCREG的第一个字符。但是，当它退出中断服务程序并且程序返回其主循环时，USART不会再次中断，也不会收到其他字符。我怀疑它与我的中断有关，因为它似乎收到了正确的数据。有关此问题的任何帮助吗？以下是我的代码。
LIST P=PIC18F45K20 ; list directive to define processor
#INCLUDE "P18F45K20.INC" ; processor specific variable definitions
; CONFIG1H
CONFIG FOSC = INTIO67 ; Oscillator Selection bits (External RC oscillator, port function on RA6)
CONFIG FCMEN = OFF ; Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
CONFIG IESO = OFF ; Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
; CONFIG2L
CONFIG PWRT = OFF ; Power-up Timer Enable bit (PWRT disabled)
CONFIG BOREN = OFF ; Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
CONFIG BORV = 18 ; Brown Out Reset Voltage bits (VBOR set to 1.8 V nominal)
; CONFIG2H
CONFIG WDTEN = OFF ; Watchdog Timer Enable bit (WDT is controlled by SWDTEN bit of the WDTCON register)
CONFIG WDTPS = 1 ; Watchdog Timer Postscale Select bits (1:32768)
; CONFIG3H
CONFIG CCP2MX = PORTC ; CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
CONFIG PBADEN = ON ; PORTB A/D Enable bit (PORTB<4:0> pins are configured as analog input channels on Reset)
CONFIG LPT1OSC = OFF ; Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation)
CONFIG HFOFST = ON ; HFINTOSC Fast Start-up (HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.)
CONFIG MCLRE = ON ; MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)
; CONFIG4L
CONFIG STVREN = OFF ; Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
CONFIG LVP = OFF ; Single-Supply ICSP Enable bit (Single-Supply ICSP enabled)
CONFIG XINST = OFF ; Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
; CONFIG5L
CONFIG CP0 = OFF ; Code Protection Block 0 (Block 0 (000800-001FFFh) not code-protected)
CONFIG CP1 = OFF ; Code Protection Block 1 (Block 1 (002000-003FFFh) not code-protected)
CONFIG CP2 = OFF ; Code Protection Block 2 (Block 2 (004000-005FFFh) not code-protected)
CONFIG CP3 = OFF ; Code Protection Block 3 (Block 3 (006000-007FFFh) not code-protected)
; CONFIG5H
CONFIG CPB = OFF ; Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
CONFIG CPD = OFF ; Data EEPROM Code Protection bit (Data EEPROM not code-protected)
; CONFIG6L
CONFIG WRT0 = OFF ; Write Protection Block 0 (Block 0 (000800-001FFFh) not write-protected)
CONFIG WRT1 = OFF ; Write Protection Block 1 (Block 1 (002000-003FFFh) not write-protected)
CONFIG WRT2 = OFF ; Write Protection Block 2 (Block 2 (004000-005FFFh) not write-protected)
CONFIG WRT3 = OFF ; Write Protection Block 3 (Block 3 (006000-007FFFh) not write-protected)
; CONFIG6H
CONFIG WRTC = OFF ; Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
CONFIG WRTB = OFF ; Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
CONFIG WRTD = OFF ; Data EEPROM Write Protection bit (Data EEPROM not write-protected)
; CONFIG7L
CONFIG EBTR0 = OFF ; Table Read Protection Block 0 (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
CONFIG EBTR1 = OFF ; Table Read Protection Block 1 (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
CONFIG EBTR2 = OFF ; Table Read Protection Block 2 (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)
CONFIG EBTR3 = OFF ; Table Read Protection Block 3 (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)
; CONFIG7H
CONFIG EBTRB = OFF ; Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)
CBLOCK 0x60 ; allocation of memory for variable block
letters
letter1
letter2
letter3
letter4
letter5
letter6
letter7
letter8
letter9
letter10
txDelay1
txDelay2
input
saved
team_mem_block
data_to_write
working_data_add
progstate
ENDC
org 0h
goto setup ;Start space in memory block
org 8h
goto HPISR ;Start space for high priority interrupt
org 18h
goto LPISR ;Start space for low priority interrupt
setup
BSF OSCCON,6
BCF OSCCON,5
BSF OSCCON,4
CLRF letters
CLRF letter1
CLRF letter2
CLRF letter3
CLRF letter4
CLRF letter5
CLRF letter6
CLRF letter7
CLRF letter8
CLRF letter9
CLRF letter10
CLRF txDelay1
CLRF txDelay2
CLRF saved
CLRF input
CLRF team_mem_block
CLRF data_to_write
CLRF working_data_add
CLRF progstate
CLRF PORTD
CLRF LATD
CLRF TRISD
CLRF INTCON ; initialize interupt console
;----------------------------USART------------------------------------
;The configuration of the USART Bits for serial communication
BSF IPR1,RCIP
BSF IPR1,TXIP
BCF TXSTA,SYNC ; Asynchronous operation
BSF TXSTA,BRGH
BSF RCSTA,SPEN ; Enables the serial port and sets the TX/RX ports as input/output
BSF RCSTA,CREN
BCF BAUDCON,BRG16 ; 8-bit baudcon bit rate
BCF BAUDCON,DTRXP
bsf BAUDCON,CKTXP
BSF TXSTA,TXEN ; Enabling the transmitter
bcf RCSTA,RX9 ;8bits
MOVLW d'12'
MOVWF SPBRG
BCF TRISC,6 ; Set TX as output
BSF TRISC,7 ; Set RX as input
CLRF PORTC
;Eusart interupt bits
BSF PIE1,RCIE
BCF PIR1,RCIF
BSF INTCON,GIE
BSF INTCON,PEIE
BSF RCON, IPEN ; enable interupts
BSF INTCON, GIEH ; Enabling high and low priority interrupts
BSF INTCON, GIEL
start
nop
nop
nop
nop
goto start
HPISR ;High Priority Interrupt Service Routine
BCF INTCON,GIE
; BSF PORTD,0
BSF RCSTA,SPEN
; call Transmit
; call Transmit
; call Transmit
; call Transmit
; call Transmit
; call Transmit
; BCF PORTD,0
BTFSC PIR1,RCIF
goto USART
BSF INTCON,GIE
BCF PIR1,RCIF
retfie
USART
clrf saved
movff RCREG,input
movlw 0x0D
cpfseq input
goto save_letter_now
; call check
goto save_letter_end
save_letter_now
call save ;save variable in correct location
save_letter_end
BSF PIE1,RCIE
retfie
save ; saving inputs into variables.
bsf saved, 0
incf letters
movlw 0x01
cpfsgt letters
goto save_let1
movlw 0x02
cpfsgt letters
goto save_let2
movlw 0x03
cpfsgt letters
goto save_let3
movlw 0x04
cpfsgt letters
goto save_let4
btfss progstate, 0
goto overflow
movlw 0x05
cpfsgt letters
goto save_let5
movlw 0x06
cpfsgt letters
goto save_let6
movlw 0x07
cpfsgt letters
goto save_let7
movlw 0x08
cpfsgt letters
goto save_let8
movlw 0x09
cpfsgt letters
goto save_let9
movlw 0x0A
cpfsgt letters
goto save_let10
; saving in different variables.
save_let1
movff input, letter1
goto overflow
save_let2
movff input, letter2
goto overflow
save_let3
movff input, letter3
goto overflow
save_let4
movff input, letter4
goto overflow
save_let5
movff input, letter5
goto overflow
save_let6
movff input, letter6
goto overflow
save_let7
movff input, letter7
goto overflow
save_let8
movff input, letter8
goto overflow
save_let9
movff input, letter9
goto overflow
save_let10
movff input, letter10
overflow
return
LPISR
retfie
Transmit
movlw 0xff
movwf txDelay1
TRANS_DELAY
movlw 0x02
movwf txDelay2
TRANS_DELAY1
decfsz txDelay2, f
goto TRANS_DELAY1
decfsz txDelay1, f
goto TRANS_DELAY
return
END