有些人可以解释为什么我在这段代码中出现语法错误。
An <= "1110" when anode = "00" else
AN <= "1101" when anode = "01" else
An <= "1011" when anode = "10" else
An <= "0111" when anode = "11";
segment <= counter_1r when anode = "00" else
segment <= counter_10r when anode = "01" else
segment <= counter_100r when anode = "10" else
segment <= counter_1000r When anode = "11";
它说
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 181. Type of An is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 182. Type of An is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 183. Type of An is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 181. Type of An is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 182. Type of An is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 183. Type of An is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 186. Type of segment is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 187. Type of segment is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 188. Type of segment is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 186. Type of segment is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 187. Type of segment is incompatible with type of <=.
ERROR:HDLParsers:800 - "C:/.Xilinx/Stopur/main.vhd" Line 188. Type of segment is incompatible with type of <=.
我不明白,因为在我的代码中我已经将我实体中所有受影响的元素设置为输出,它们都使用相同的类型。
PORT(
CLK: in std_logic;
-- LED: out std_logic_vector (7 downto 0);
-- Switch: in std_logic_vector(7 downto 0);
Segment: out std_logic_vector (7 downto 0);
AN: out std_logic_vector (3 downto 0)
);
end Main;
architecture Behavioral of Main is
signal counter_1000: integer range 0 to 9;
signal counter_100: integer range 0 to 9;
signal counter_10: integer range 0 to 9;
signal counter_1: integer range 0 to 9;
signal counter_1r: std_logic_vector(7 downto 0);
signal counter_10r: std_logic_vector(7 downto 0);
signal counter_100r: std_logic_vector(7 downto 0);
signal counter_1000r: std_logic_vector(7 downto 0);
signal prescaler: integer range 0 to 50000000;
signal limit: integer range 0 to 50000000;
signal Anode: std_logic_vector(1 downto 0);
begin
答案 0 :(得分:2)
条件信号分配(在过程之外)写为:
An <=
"1110" when anode = "00" else
"1101" when anode = "01" else
"1011" when anode = "10" else
"0111" when anode = "11" else
"0000";
segment <=
counter_1r when anode = "00" else
counter_10r when anode = "01" else
counter_100r when anode = "10" else
counter_1000r When anode = "11" else
"00000000";
在流程内部,您需要使用 if
语句或 case
语句。
答案 1 :(得分:0)
要了解收到错误消息的原因,请查看以下代码:
An <= "1110" when anode = "00" else (AN <= "1101")....
else
子句将被编译为AN
与1101
的比较,以查看它是否小于或等于。哪个类型为boolean
,与An
的类型(向量)不兼容。 (我希望VHDL没有选择<=
作为赋值运算符,但我们有!)
您需要的语法更像是这样(注意其他行上缺少<=
)
An <= "1110" when anode = "00" else
"1101" when anode = "01" else
"1011" when anode = "10" else
"0111" when anode = "11" else
null;