我有两个2D数组:
type array1x1D is array (0 to 10) of std_logic_vector(0 to 10); -- Array of arrays
type array2D is array (0 to 10, 0 to 10) of std_logic; -- Real 2D array
如何访问前者的std_logic_vectors
范围和后者的范围?我当然可以使用变量来跟踪它们的大小,但我宁愿避免这种情况。我试图使用GENERATE
语句循环遍历数组。
答案 0 :(得分:8)
<强> array1x1D:强>
VHDL-2002:如果您是std_logic_vector(0 downto 10)
,则需要子类型
想得到这部分的范围,从而将类型分为:
subtype array1x1D_element is std_logic_vector(0 to 10);
type array1x1D is array (0 to 10) of array1x1D_element; -- Array of arrays
然后你可以array1x1D_element'range
。
VHDL-2008:使用添加的'element
属性(可能用于此目的:-),
并写下array1x1D'element'range
。
<强> array2D:强>
通过指向'range
的索引访问不同的维度
使用array2D'range(1)
和array2D'range(2)
。
答案 1 :(得分:2)
entity test1 is
end entity;
library ieee;
use ieee.std_logic_1164.all;
architecture a1 of test1 is
type array1x1D is array (0 to 10) of std_logic_vector(0 to 10); -- Array of arrays
type array2D is array (0 to 10, 0 to 5) of std_logic; -- Real 2D array
signal s1 : array1x1D;
begin
name : process is
begin
report "array1x1D(0)'length:" & integer'image(s1(0)'length);
report "array2D'length(1):" & integer'image(array2D'length(1));
report "array2D'length(2):" & integer'image(array2D'length(2));
wait;
end process name;
end architecture a1;
产生
# run -all
# ** Note: array1x1D(0)'length:11
# Time: 0 ns Iteration: 0 Instance: /test1
# ** Note: array2D'length(1):11
# Time: 0 ns Iteration: 0 Instance: /test1
# ** Note: array2D'length(2):6
# Time: 0 ns Iteration: 0 Instance: /test1
#
我无法立即找到一种方法来计算1d数组的矢量元素的长度,而没有该类型的中间信号/常数/变量......