Question

我正在尝试使用xilinx工具来定义和模拟VHDL中的8位移位器，该移位器可以向左或向右移动或旋转0,1,2或3位位置。我试图在digilent basys 2板上实现这一点。

我刚开始学习vhdl编程。有人可以帮忙吗？任何人都可以告诉我vhdl代码应该是什么样的吗？

Answer 1

移位和旋转功能可以在numeric_std包中找到。下面是一些示例代码作为起点：

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.numeric_std.all;


entity EXAMPLE is
Port ( 
    clk : in  STD_LOGIC; -- master clock
    enable : in std_logic; -- when '1' --> rotate
    dir : in  STD_LOGIC; -- when '1': right, when '0': left
    nr : in  STD_LOGIC_VECTOR (1 downto 0); -- number of steps to rotate
    din : in  STD_LOGIC_VECTOR (7 downto 0); -- in vector
    dout : out  STD_LOGIC_VECTOR (7 downto 0)); -- out vector
end EXAMPLE;

architecture Behavioral of EXAMPLE is

begin

shifter: process(clk)
begin
   if rising_edge(clk) then
      if enable='1' then
         if dir='0' then -- right
            dout<=std_logic_vector(rotate_right(unsigned(din),to_integer(unsigned(nr))));
         else -- left
            dout<=std_logic_vector(rotate_left(unsigned(din), to_integer(unsigned(nr))));
         end if;
      end if;

    end if;
 end process shifter;
end Behavioral;

Answer 2

Rotate Right = bitvector(0) & bitvector(7 downto 1);
<br>Rotate Left = bitvector(6 downto 0) & bitvector(7);

使用连接，因为其他功能无法合成。

Answer 3

使用ieee.numeric_std library中为此目的设计的功能。

使用（或强制转换）相应signed或unsigned矢量类型的输入。

这是这些功能的“原型”，这样你就可以看到你得到了什么。

 --============================================================================
  -- Shift and Rotate Functions
  --============================================================================

  -- Id: S.1
  function SHIFT_LEFT (ARG: UNSIGNED; COUNT: NATURAL) return UNSIGNED;
  -- Result subtype: UNSIGNED(ARG'LENGTH-1 downto 0)
  -- Result: Performs a shift-left on an UNSIGNED vector COUNT times.
  --         The vacated positions are filled with '0'.
  --         The COUNT leftmost elements are lost.

  -- Id: S.2
  function SHIFT_RIGHT (ARG: UNSIGNED; COUNT: NATURAL) return UNSIGNED;
  -- Result subtype: UNSIGNED(ARG'LENGTH-1 downto 0)
  -- Result: Performs a shift-right on an UNSIGNED vector COUNT times.
  --         The vacated positions are filled with '0'.
  --         The COUNT rightmost elements are lost.

  -- Id: S.3
  function SHIFT_LEFT (ARG: SIGNED; COUNT: NATURAL) return SIGNED;
  -- Result subtype: SIGNED(ARG'LENGTH-1 downto 0)
  -- Result: Performs a shift-left on a SIGNED vector COUNT times.
  --         The vacated positions are filled with '0'.
  --         The COUNT leftmost elements are lost.

  -- Id: S.4
  function SHIFT_RIGHT (ARG: SIGNED; COUNT: NATURAL) return SIGNED;
  -- Result subtype: SIGNED(ARG'LENGTH-1 downto 0)
  -- Result: Performs a shift-right on a SIGNED vector COUNT times.
  --         The vacated positions are filled with the leftmost
  --         element, ARG'LEFT. The COUNT rightmost elements are lost.

  --============================================================================

  -- Id: S.5
  function ROTATE_LEFT (ARG: UNSIGNED; COUNT: NATURAL) return UNSIGNED;
  -- Result subtype: UNSIGNED(ARG'LENGTH-1 downto 0)
  -- Result: Performs a rotate-left of an UNSIGNED vector COUNT times.

  -- Id: S.6
  function ROTATE_RIGHT (ARG: UNSIGNED; COUNT: NATURAL) return UNSIGNED;
  -- Result subtype: UNSIGNED(ARG'LENGTH-1 downto 0)
  -- Result: Performs a rotate-right of an UNSIGNED vector COUNT times.

  -- Id: S.7
  function ROTATE_LEFT (ARG: SIGNED; COUNT: NATURAL) return SIGNED;
  -- Result subtype: SIGNED(ARG'LENGTH-1 downto 0)
  -- Result: Performs a logical rotate-left of a SIGNED
  --         vector COUNT times.

  -- Id: S.8
  function ROTATE_RIGHT (ARG: SIGNED; COUNT: NATURAL) return SIGNED;
  -- Result subtype: SIGNED(ARG'LENGTH-1 downto 0)
  -- Result: Performs a logical rotate-right of a SIGNED
  --         vector COUNT times.

8位移位器-VHDL

3 个答案: