16位随机数发生器查找表

Question

我在vhdl中是一个新手，我在vhdl中编写了一个16位伪随机数生成器，现在，我必须创建代码仿真（或测试台）的文本文件。您能帮我编写文本文件吗？谢谢大家。

library ieee;
    use ieee.std_logic_1164.all;

entity lfsr is
  port (
    cout   :out std_logic_vector (15 downto 0);-- Output of the counter
    enable :in  std_logic;                    -- Enable counting
    clk    :in  std_logic                    -- Input rlock

  );
end entity;

architecture rtl of lfsr is
    signal seed           :std_logic_vector (15 downto 0):="1010110010101100";
    signal linear_feedback :std_logic;

begin
    linear_feedback <= (seed(15) xor seed(14) xor seed(12) xor seed(3) xor seed(0));


process (clk) begin
         if (rising_edge(clk)) then
        if (enable = '1') then
            seed <= (seed(14 downto 0)& linear_feedback);
        end if;
    end if;
end process;
cout <= seed;
end architecture;

//Test Bench

library ieee;
use ieee.std_logic_1164.all;

entity tb_lfsr is
end tb_lfsr;

architecture tb of tb_lfsr is

component lfsr
    port (cout   : out std_logic_vector (15 downto 0);
          enable : in std_logic;
          clk    : in std_logic);
end component;

signal cout   : std_logic_vector (15 downto 0);
signal enable : std_logic;
signal clk    : std_logic;

constant TbPeriod : time := 10 ns; -- EDIT Put right period here
signal TbClock : std_logic := '0';
signal TbSimEnded : std_logic := '0';

begin

dut : lfsr
port map (cout   => cout,
          enable => enable,
          clk    => clk);


TbClock <= not TbClock after TbPeriod/2 when TbSimEnded /= '1' else '0';

   clk <= TbClock;

stimuli : process
begin
           enable <= '1';


    wait for 100 ns;


    wait for 1000 * TbPeriod;

            TbSimEnded <= '1';
    wait;
end process;

end tb;


configuration cfg_tb_lfsr of tb_lfsr is
for tb
end for;
end cfg_tb_lfsr;