我正在QUARTUS II下用VHDL 1993进行编程,我只是创建了两个组件来尝试解决我将要提出的问题,因为它们不是解决方案。事先将组件文件包含在设计中,并且一次可以工作。
因此,在我的基本应用程序中,我尝试完成两项工作,一项是使一个LED闪烁,然后打开另一个由开关控制的LED,当我声明两个组件中只有一个由开关控制LED的组件起作用时,然后当我未声明LED开关组件并且其信号在顶层实体中时,指示灯就起作用了,我想那是顶层实体“ test2”的信号声明存在问题,但是我不明白为什么它只能工作一次使用一件事时,我在顶级实体上编写的代码是:
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity test2 is
port( clk_cpu, K2: in std_logic;
led1, led2: out std_logic);
end test2;
architecture struct of test2 is
component tmp_toogler
port( clk: in std_logic;
led: out std_logic);
end component;
component yes_driver
port( input: in std_logic;
output: out std_logic);
end component;
begin
instanciaD: yes_driver PORT MAP(
K2, led2
);
instancia1: tmp_toogler PORT MAP(
clk_cpu, led1
);
end struct;
信号灯组件:
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity tmp_toogler is
port( clk: in std_logic;
led: out std_logic);
end tmp_toogler;
architecture struct of tmp_toogler is
signal counter: integer range 0 to 50000000;
signal state : std_logic := '1';
begin
process(clk)
begin
if(rising_edge(clk)) then
counter <= counter + 1;
end if;
if(counter = 50000000) then
counter <= 0;
if(state = '0') then
led <= '1';
state <= '1';
else
led <= '0';
state <= '0';
end if;
end if;
end process;
end struct;
led开关:
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity yes_driver is
port( input: in std_logic;
output: out std_logic);
end yes_driver;
architecture struct of yes_driver is
begin
process(input)
begin
output <= input;
end process;
end struct;
我觉得这是有关执行多个任务的非常基本的问题,因此,我在此先敦促寻求帮助。