什么是systemverilog中的topic关键字

时间:2018-07-06 11:54:59

标签: system-verilog

我正在分析一个VIP,并在其中找到以下一行:

topic               class member;

从未见过这样的结构。 有人可以解释“主题”是什么意思吗?

这是代码:

/*
    topic: AXI4STREAM VIP Package
    The package is systemverilog package for XILINX AXI4STREAM Verification Component IP, it includes all the classes,enums,
    typedefs etc. XILINX AXI4STREAM Verification Component IP has been developed to support the simulation of customer
    designed AXI-based IP.  Please refer PG277 for more details about this IP.
  */
   topic  AXI4STREAM VIP Package

  /*
    topic: class member
    <axi4stream_vif_proxy> `XIL_AXI4STREAM_PARAM_ORDER         vif_proxy; AXI4STREAM VIF Proxy Class. 
    <xil_analysis_port> #(axi4stream_monitor_transaction)      item_collected_port; provides methods to collect monitor transaction.
  */
  topic              class member;

这是免费的xilinx AXI VIP代码的一部分

1 个答案:

答案 0 :(得分:1)

SystemVerilog中没有这样的保留关键字。请显示周围的代码。

更新:看起来它可能被其他一些文档工具使用。您需要询问编写代码的人员。