使用2的补码在verilog中的数字的负数

Question

我有一个号码＆＃34; A＆＃34;这是16位宽，用2的补码表示。我如何得到＆＃34; -A＆＃34;在verilog？

Answer 1

reg [4:0] num;
reg  signed [4:0] neg;
 num= 5;   
$display("num= %5b", num);

neg= -num;  
$display("neg = %d", neg);

点击此链接：http://www.referencedesigner.com/tutorials/verilog/verilog_58.php

Answer 2

wire [15:0] A;
wire [15:0] M_A; // Minus A

// The thing about 2's complement, is that the complement can be computed as NEG(x) + 1.
// In the following way:
assign M_A[15:0] = ~A[15:0] + 1'b1;

Answer 3

您可以对存储的2的补码编号进行补充，以获得-A。

假设这是一个例子。

- A = 10
  So in 2's complement A = 0000_0000_0000_0010
  Now for -A,
  2's complement of A = 1111_1111_1111_1110 (-10 in 2's complement form)

- A = -20
  So in 2's complement A = 1111_1111_1110_1100
  Now for -A,
  2's complement of A = 0000_0000_0001_0100 (20 in 2's complement form)

Answer 4

我过去最简单的方式：

response = consumer.embed(url)

在这种情况下，编译器/合成器非常智能，可以实现2的补码操作，并且代码易于阅读。