有人可以告诉我为什么以下代码不会在Chisel中详细说明?看来我无法分配给UInt中的各个位。这是设计的吗?
我确实看到了杰克对类似问题的回答,但是以下类型的逻辑跨越了一些链的常见且很容易在SV等参数化。我可以看到创建一个Bool的Vector以及个别位,但仍然是如何回到UInt的问题...
def ffo(pwidth:Int, in:UInt) : UInt = {
val rval = Wire(UInt(width=pwidth))
rval(0) := in(0)
for(w <- 1 until pwidth) {
rval(w) := in(w) & !( in(w-1,0).orR() )
}
rval
}
结果:
firrtl.passes.CheckGenders$WrongGender: @[Misc.scala 21:13:@5808.4]: [module IuIrRename] Expression T_1824 is used as a FEMALE but can only be used as a MALE.
firrtl.passes.CheckGenders$WrongGender: @[Misc.scala 23:15:@5815.4]: [module IuIrRename] Expression T_1826 is used as a FEMALE but can only be used as a MALE.
firrtl.passes.CheckGenders$WrongGender: @[Misc.scala 23:15:@5822.4]: [module IuIrRename] Expression T_1834 is used as a FEMALE but can only be used as a MALE.
firrtl.passes.CheckGenders$WrongGender: @[Misc.scala 23:15:@5829.4]: [module IuIrRename] Expression T_1842 is used as a FEMALE but can only be used as a MALE.
firrtl.passes.CheckGenders$WrongGender: @[Misc.scala 21:13:@5834.4]: [module IuIrRename] Expression T_1851 is used as a FEMALE but can only be used as a MALE.
答案 0 :(得分:1)
在继续实验之后(以及查看生成的Verilog之后),以下代码与我正在寻找的代码相同:
def ffo(pwidth:Int, in:UInt) : UInt = {
val ary = Wire(Vec(pwidth, Bool()))
ary(0) := in(0)
for(w <- 1 until pwidth) {
ary(w) := in(w) && !( in(w-1,0).orR() )
}
val rval = Reverse(Cat(ary))
rval
}