尝试为zed board构建RoCC加速器默认累加器示例,但得到错误的"非法指令"
我在configs.scala文件中尝试了以下配置: -
class WithAccumRocc extends Config(
(pname,site,here) => pname match {
case RoccNMemChannels => 1
case RoccMaxTaggedMemXacts => 0
case BuildRoCC => {
Some((p: Parameters) =>
Module(new AccumulatorExample()(p.alterPartial({ case CoreName => "AccumRocc" }))))
}
}
)
class WithRoCCConfig extends Config(new WithAccumRocc ++ new DefaultFPGAConfig)
比特流是成功生成的,但是当我运行了从riscv-isa-sim中给出的示例生成的dummy_rocc_test二进制文件时,我在zed板上得到了以下错误。
root@zynq:~# ./fesvr-zynq pk /sdcard/Custom\ elfs/dummy_rocc
z 0000000000000000 ra 0000000000010044 sp 000000000feffb10 gp 0000000000017880
tp 0000000000000000 t0 0000000000017178 t1 0000000000017178 t2 0000000000000000
s0 000000000feffb40 s1 0000000000000000 a0 0000000000000001 a1 000000000feffb48
a2 0000000000000000 a3 0000000000000000 a4 0000000000000000 a5 000000000000007b
a6 0000000000000000 a7 0000000000000001 s2 0000000000000000 s3 0000000000000000
s4 0000000000000000 s5 0000000000000000 s6 0000000000000000 s7 0000000000000000
s8 0000000000000000 s9 0000000000000000 sA 0000000000000000 sB 0000000000000000
t3 0000000000000000 t4 0000000000000000 t5 0000000000000000 t6 0000000000000000
pc 0000000000010168 va 0000000000010168 insn 0027e00b sr 8000000000003008
An illegal instruction was executed!
非常感谢任何帮助。
P.S。 : - dummy_rocc_test示例与spike一起工作正常,并已使用riscv64-unknown-elf-gcc编译
答案 0 :(得分:0)
大家好,这个问题已经解决,一旦做出改变,火箭需要用新的pga配置构建,生动的项目也必须相应更新,以便生成新的比特流。