在组合电路,Verilog或SystemVerilog中互连模块

时间:2014-12-23 23:48:24

标签: verilog system-verilog

我希望在网格中使用列和行连接(如方案中)连接模块的多个实例。我可以使用嵌套的生成块吗?我需要代码可扩展,因为设计很大。 grid

模块的Output1被驱动到左侧模块的input1。模块的输出2,3被驱动到其下方模块的输入2,3。

在摩根回答后编辑我的问题: 我尝试使用以下代码作为输入给出每个数组的一个片段:

module top(
//Inputs to system:
input out1[0][1:3],
input out2[1:3][0], 
input out3[1:3][0]
);

wire out1[0:3][1:3];
wire out2[1:3][0:3];
wire out3[1:3][0:3];

我无法编译它。我的错是什么?我试图找出自己,但我不能。

1 个答案:

答案 0 :(得分:3)

基于已编辑问题的新答案。答案将通过我的过程,理解问题和改进,否则使用的生成将非常难以理解。跳到最后看到生成语法。

首先从给定图表中获得所需连接的示例。

基础模块:

module m (
  input  in1,
  input  in2,
  input  in3,
  output out1,
  output out2,
  output out3
);
endmodule

示例连接:

//row 1 to drive row 2 (in2/3)
//column 1 to drive column 2 (in1)

//port _ col(x) _ row(y) 

wire out1_1_1, out2_1_1, out3_1_1;
wire out1_1_2, out2_1_2, out3_1_2;
wire out1_1_3, out2_1_3, out3_1_3;

wire out1_2_1, out2_2_1, out3_2_1;
wire out1_2_2, out2_2_2, out3_2_2;
wire out1_2_3, out2_2_3, out3_2_3;

wire out1_3_1, out2_3_1, out3_3_1;
wire out1_3_2, out2_3_2, out3_3_2;
wire out1_3_3, out2_3_3, out3_3_3;


//First column  
m m_1_1( .in1(    ?    ), .in2(   ?     ), .in3(   ?     ),   
         .out1(out1_1_1), .out2(out2_1_1), .out3(out3_1_1)  );
m m_1_2( .in1(    ?    ), .in2( out2_1_1), .in3( out3_1_1),
         .out1(out1_1_2), .out2(out2_1_2), .out3(out3_1_2)  ); //in2/3 driven from 0_0 (Above)
m m_1_3( .in1(    ?    ), .in2( out2_1_2), .in3( out3_1_2),
         .out1(out1_1_3), .out2(out2_1_3), .out3(out3_1_3)  ); //in2/3 driven from 0_1 (above)

//Second Vertical column, in1's driven from previous column.
m m_2_1( .in1( out1_1_1), .in2(   ?    ),  .in3(   ?     ),
         .out1(out1_2_1), .out2(out2_2_1), .out3(out3_2_1)  ); 
m m_2_2( .in1( out1_1_2), .in2( out2_2_1), .in3( out3_2_1),
         .out1(out1_2_2), .out2(out2_2_2), .out3(out3_2_2)  );
m m_2_3( .in1( out1_1_3), .in2( out2_2_2), .in3( out3_2_2),
         .out1(out1_2_3), .out2(out2_2_3), .out3(out3_2_3)  );

m m_3_1( .in1( out1_2_1), .in2(   ?    ), .in3(   ?    ).
         .out1(out1_3_1), .out2(out2_3_1), .out3(out3_3_1) );
m m_3_2( .in1( out1_2_2), .in2( out2_3_1), .in3( out3_3_1),
         .out1(out1_3_2), .out2(out2_3_2), .out3(out3_3_2) );
m m_3_3( .in1( out1_2_3), .in2( out2_3_2), .in3( out3_3_2),
         .out1(out1_3_3), .out2(out2_3_3), .out3(out3_3_3) );

编码到导线中的x y数字可以成为数组的索引,可以与生成语句一起使用,要解决的主要问题是将上面标记的主输入与?

连接起来

填补这些空白以匹配我们最终的模式与一些索引'0',因此为什么我从第一个例子的1开始。然后补充说:

//Inputs to system:
wire out1_0_1, out1_0_2, out1_0_3;
wire out2_1_0, out3_1_0;
wire out2_2_0, out3_2_0;
wire out2_3_0, out3_3_0;

//First column  
m m_1_1( .in1( out1_0_1), .in2( out2_1_0), .in3( out3_1_0),   
         .out1(out1_1_1), .out2(out2_1_1), .out3(out3_1_1)  );
m m_1_2( .in1( out1_0_2), .in2( out2_1_1), .in3( out3_1_1),
         .out1(out1_1_2), .out2(out2_1_2), .out3(out3_1_2)  ); //in2/3 driven from 0_0 (Above)
m m_1_3( .in1( out1_0_3), .in2( out2_1_2), .in3( out3_1_2),
         .out1(out1_1_3), .out2(out2_1_3), .out3(out3_1_3)  ); //in2/3 driven from 0_1 (above)

//Second Vertical column, in1's driven from previous column.
m m_2_1( .in1( out1_1_1), .in2( out2_2_0), .in3( out3_2_0),
         .out1(out1_2_1), .out2(out2_2_1), .out3(out3_2_1)  ); 
m m_2_2( .in1( out1_1_2), .in2( out2_2_1), .in3( out3_2_1),
         .out1(out1_2_2), .out2(out2_2_2), .out3(out3_2_2)  );
m m_2_3( .in1( out1_1_3), .in2( out2_2_2), .in3( out3_2_2),
         .out1(out1_2_3), .out2(out2_2_3), .out3(out3_2_3)  );

m m_3_1( .in1( out1_2_1), .in2( out2_3_0), .in3( out3_3_0).
         .out1(out1_3_1), .out2(out2_3_1), .out3(out3_3_1) );
m m_3_2( .in1( out1_2_2), .in2( out2_3_1), .in3( out3_3_1),
         .out1(out1_3_2), .out2(out2_3_2), .out3(out3_3_2) );
m m_3_3( .in1( out1_2_3), .in2( out2_3_2), .in3( out3_3_2),
         .out1(out1_3_3), .out2(out2_3_3), .out3(out3_3_3) );

现在将导线矢量化以用于生成,最后得到:

wire out1[0:3][1:3];
wire out2[1:3][0:3];
wire out3[1:3][0:3];

//First column  
m m_1_1( .in1( out1[0][1]), .in2( out2[1][0]), .in3( out3[1][0]),   
         .out1(out1[1][1]), .out2(out2[1][1]), .out3(out3[1][1])  );
m m_1_2( .in1( out1[0][2]), .in2( out2[1][1]), .in3( out3[1][1]),
         .out1(out1[1][2]), .out2(out2[1][2]), .out3(out3[1][2])  ); //in2/3 driven from 0_0 (Above)
m m_1_3( .in1( out1[0][3]), .in2( out2[1][2]), .in3( out3[1][2]),
         .out1(out1[1][3]), .out2(out2[1][3]), .out3(out3[1][3])  ); //in2/3 driven from 0_1 (above)

//Second Vertical column, in1's driven from previous column.
m m_2_1( .in1( out1[1][1]), .in2( out2[2][0]), .in3( out3[2][0]),
         .out1(out1[2][1]), .out2(out2[2][1]), .out3(out3[2][1])  ); 
m m_2_2( .in1( out1[1][2]), .in2( out2[2][1]), .in3( out3[2][1]),
         .out1(out1[2][2]), .out2(out2[2][2]), .out3(out3[2][2])  );
m m_2_3( .in1( out1[1][3]), .in2( out2[2][2]), .in3( out3[2][2]),
         .out1(out1[2][3]), .out2(out2[2][3]), .out3(out3[2][3])  );

m m_3_1( .in1( out1[2][1]), .in2( out2[3][0]), .in3( out3[3][0]).
         .out1(out1[3][1]), .out2(out2[3][1]), .out3(out3[3][1]) );
m m_3_2( .in1( out1[2][2]), .in2( out2[3][1]), .in3( out3[3][1]),
         .out1(out1[3][2]), .out2(out2[3][2]), .out3(out3[3][2]) );
m m_3_3( .in1( out1[2][3]), .in2( out2[3][2]), .in3( out3[3][2]),
         .out1(out1[3][3]), .out2(out2[3][3]), .out3(out3[3][3]) );

现在只需要找出指数的模式和方程式。

m m_x_y( .in1( out1[x-1][y]), .in2( out2[x][y-1]), .in3( out3[x][y-1]),   
         .out1(out1[x  ][y]), .out2(out2[x][y  ]), .out3(out3[x][y  ])  );

TL; DR

包含在生成中会变为:

//Inputs to system:
//out1[0][1], out1[0][2], out1[0][3]
//out2[1][0], out3[1][0]
//out2[2][0], out3[2][0]
//out2[3][0], out3[3][0]

parameter WIDTH = 3; 
parameter DEPTH = 3;

wire out1[0:WIDTH][1:DEPTH];
wire out2[1:WIDTH][0:DEPTH];
wire out3[1:WIDTH][0:DEPTH];

genvar x;
genvar y;
generate 
  for(y=1; y<=DEPTH; y++) begin
    for (x=1; x<=WIDTH; x++) begin
      m m_x_y( .in1( out1[x-1][y]), .in2( out2[x][y-1]), .in3( out3[x][y-1]),   
               .out1(out1[x  ][y]), .out2(out2[x][y  ]), .out3(out3[x][y  ])  );
    end
  end
endgenerate

输入

输入可以通过分配连接:

module xor (
  input in1,
  input in2,
  //...
);

parameter WIDTH = 3; 
parameter DEPTH = 3;

wire out1[0:WIDTH][1:DEPTH];
wire out2[1:WIDTH][0:DEPTH];
wire out3[1:WIDTH][0:DEPTH];

assign out1[0][1] = in1;
assign out1[0][2] = in2;
// etc