Question

我是VHDL的新手，我试着写一些可以通过按下按钮（每个显示一个按钮）来增加七段显示中显示的值的东西。它合成并生成但有警告，最后当我按下电路板上的按钮时没有任何反应。这是我的警告：

警告：PhysDesignRules：367 - 信号不完整。信号不会在设计中驱动任何负载引脚。

警告：参数：288 - 信号B1_IBUF无负载。 PAR不会尝试路由此信号。

当然每个按钮都有一个我看过这些解决方案 The signal <n1<1>_IBUF> is incomplete VHDL - PhysDesignRules:367

但是我无法理解它们或者它们可能并不相关

当然这是我的代码：

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;

-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity top is
Port (CLKIN : in std_logic;
        B1 : in std_logic; --buttons
        B2 : in std_logic;
        B3 : in std_logic;
        B4 : in std_logic;           
        AN3 : inout std_logic; --if the display is on or not
     AN2 : inout std_logic;
     AN1 : inout std_logic;
     AN0 : inout std_logic;
     LED : out std_logic_vector(6 downto 0)); --the logic vector to be used for each display
end top;

architecture Behavioral of top is
signal CTR : STD_LOGIC_VECTOR(8 downto 0); 
signal LED0 : std_logic_vector(6 downto 0); -- since every display will have different                 number I need for vectors
signal LED1 : std_logic_vector(6 downto 0);
signal LED2 : std_logic_vector(6 downto 0);
signal LED3 : std_logic_vector(6 downto 0);
shared variable int1 : integer range 0 to 11 :=0; --counter for each display
shared variable int2 : integer range 0 to 11 := 0;
shared variable int3 : integer range 0 to 11 := 0;
shared variable int4 : integer range 0 to 11 := 0;
begin   

--it does display these things!
LED0 <= "1000000"; -- displaying 0
LED1 <= "1000000";
LED2 <= "1000000";
LED3 <= "1000000";

-- button listener
process(B1,B2,B3,B4)
begin
if(B1='1') then
    int1:=int1+1; --when I press a button it increases the number
    if (int1=10) then -- if it is more than 9 it should reset
        int1:=0;
    end if;
elsif (B2='1') then
    int2:=int2+1;
    if (int2=10) then
        int2:=0;
    end if;
elsif (B3='1') then
    int3:=int3+1;
    if (int3=10) then
        int3:=0;
    end if;
elsif (B4='1') then
    int4:=int4+1;
    if (int4=10) then
        int4:=0;
    end if;
end if;


end process;

   Process (CLKIN)
  begin
  case  int1 is --all of these "case" s are for converting from integer to display vector
when 0=> LED0 <="0000001";  -- '0'
when 1=> LED0 <="1001111";  -- '1'
when 2=> LED0 <="0010010";  -- '2'
when 3=> LED0 <="0000110";  -- '3'
when 4=> LED0 <="1001100";  -- '4' 
when 5=> LED0 <="0100100";  -- '5'
when 6=> LED0 <="0100000";  -- '6'
when 7=> LED0 <="0001111";  -- '7'
when 8=> LED0 <="0000000";  -- '8'
when 9=> LED0 <="0000100";  -- '9'
when others=> LED0 <="1111111"; 
end case;

case  int2 is
when 0=> LED1 <="0000001";  -- '0'
when 1=> LED1 <="1001111";  -- '1'
when 2=> LED1 <="0010010";  -- '2'
when 3=> LED1 <="0000110";  -- '3'
when 4=> LED1 <="1001100";  -- '4' 
when 5=> LED1 <="0100100";  -- '5'
when 6=> LED1 <="0100000";  -- '6'
when 7=> LED1 <="0001111";  -- '7'
when 8=> LED1 <="0000000";  -- '8'
when 9=> LED1 <="0000100";  -- '9'
when others=> LED1 <="1111111"; 
end case;

case  int3 is
when 0=> LED2 <="0000001";  -- '0'
when 1=> LED2 <="1001111";  -- '1'
when 2=> LED2 <="0010010";  -- '2'
when 3=> LED2 <="0000110";  -- '3'
when 4=> LED2 <="1001100";  -- '4' 
when 5=> LED2 <="0100100";  -- '5'
when 6=> LED2 <="0100000";  -- '6'
when 7=> LED2 <="0001111";  -- '7'
when 8=> LED2 <="0000000";  -- '8'
when 9=> LED2 <="0000100";  -- '9'
when others=> LED2 <="1111111"; 
end case;

case int4 is
when 0=> LED3 <="0000001";  -- '0'
when 1=> LED3 <="1001111";  -- '1'
when 2=> LED3 <="0010010";  -- '2'
when 3=> LED3 <="0000110";  -- '3'
when 4=> LED3 <="1001100";  -- '4' 
when 5=> LED3 <="0100100";  -- '5'
when 6=> LED3 <="0100000";  -- '6'
when 7=> LED3 <="0001111";  -- '7'
when 8=> LED3 <="0000000";  -- '8'
when 9=> LED3 <="0000100";  -- '9'
when others=> LED3 <="1111111"; 
end case;
--this is the clock counter, this part works fine, I've tried it before
if CLKIN'event and CLKIN = '1' then
  if (CTR="000000000") then
    if (AN0='0') then 
      AN0 <= '1';    
      LED <= LED0;                -- the letter n
      AN1 <= '0';
    elsif (AN1='0') then 
      AN1 <= '1';        
      LED <= LED1;             -- the letter n
      AN2 <= '0';
    elsif (AN2='0') then 
      AN2 <= '1';    
      LED <= LED2;             -- the letter A
      AN3 <= '0';
    elsif (AN3='0') then 
      AN3 <= '1';
      LED <= LED3;             -- the letter E
      AN0 <= '0';
    end if;
  end if;
  CTR<=CTR+"000000001";
  if (CTR > "100000000") then   -- counter reaches 2^13
    CTR<="000000000";
  end if;
end if;
  End Process;
End Behavioral;

我知道它不是很简洁，但我会努力变得更好：）

这是我的.ucf

NET "LED<0>" LOC = "L14";
NET "LED<1>" LOC = "H12";
NET "LED<2>" LOC = "N14";
NET "LED<3>" LOC = "N11";
NET "LED<4>" LOC = "P12";
NET "LED<5>" LOC = "L13";
NET "LED<6>" LOC = "M12";
NET "AN0" LOC ="F12";
NET "AN1" LOC ="J12";
NET "AN2" LOC ="M13";
NET "AN3" LOC ="K14";
NET "CLKIN" LOC ="B8";
NET "B1" LOC ="A7";
NET "B2" LOC ="M4";
NET "B3" LOC ="C11";
NET "B4" LOC ="G12";

谢谢！

Answer 1

我不确定这里的初始状态。

我看到它的方式，AN0到AN3的所有测试都不等于初始状态的'0'。因此，没有执行将LED和AN0更新为AN3的块，因此精心准备的LED状态未使用，因此所有这些连接都已优化，返回到输入现在对输出没有影响。

在这个阶段，编译器想知道为什么你声明了一个不影响设计中任何东西的输入。

信号不完整，信号不会驱动设计中的任何负载引脚

1 个答案: