Question

我是VHDL的初学者，我没有想到为什么我会收到错误。如果我删除该函数，一切都编译正确，但当我把它放回去时，我得到以下错误：

“function”附近的语法错误。

“begin”附近的语法错误。

“when”附近的语法错误。

你明白了。

这是神弃绝的功能：

    function decod ( x : in integer range 0 to 9)
return STD_LOGIC_VECTOR is 
variable temp : in STD_LOGIC_VECTOR (6 downto 0);
    begin
    case x is
        when 0 => temp <= "0000001"; -- 0
        when 1 => temp <= "1001111"; -- 1
        when 2 => temp <= "0010010"; -- 2
        when 3 => temp <= "0000110"; -- 3 
        when 4 => temp <= "1001100"; -- 4
        when 5 => temp <= "0100100"; -- 5
        when 6 => temp <= "0100000"; -- 6
        when 7 => temp <= "0001111"; -- 7
        when 8 => temp <= "0000000"; -- 8 
        when 9 => temp <= "0000100"; -- 9 
    end case;
    return temp;
end decod;

Answer 1

删除＆＃34; in＆＃34;来自变量声明的关键字。也没有必要在＆＃34;中指定＆＃34;在函数参数列表中，因为函数只接受＆＃34; in＆＃34;参数。您只需要在端口和过程上指定方向。

Answer 2

除了凯文的答案之外，你应该删除变量声明中的模式，你使用错误的作业类型temp <=应该是temp :=：

library ieee;
use ieee.std_logic_1164.all;

entity foo is
end entity;

architecture fum of foo is
    function decod ( x : in integer range 0 to 9)
return STD_LOGIC_VECTOR is 
variable temp : STD_LOGIC_VECTOR (6 downto 0);
    begin
    case x is
        when 0 => temp := "0000001"; -- 0
        when 1 => temp := "1001111"; -- 1
        when 2 => temp := "0010010"; -- 2
        when 3 => temp := "0000110"; -- 3 
        when 4 => temp := "1001100"; -- 4
        when 5 => temp := "0100100"; -- 5
        when 6 => temp := "0100000"; -- 6
        when 7 => temp := "0001111"; -- 7
        when 8 => temp := "0000000"; -- 8 
        when 9 => temp := "0000100"; -- 9 
    end case;
    return temp;
end decod;
begin
end architecture;

分析和阐述。

注意，该函数由架构声明区域中的子程序体声明。

在程序包声明中不允许使用子程序体，函数体可以在相应的程序包包中找到：

library ieee;
use ieee.std_logic_1164.all;


package fum is
    function decod ( x : in integer range 0 to 9) return STD_LOGIC_VECTOR;
end package fum;

package body fum is

    function decod ( x : in integer range 0 to 9) return STD_LOGIC_VECTOR is 
        variable temp : STD_LOGIC_VECTOR (6 downto 0);
    begin
        case x is
            when 0 => temp := "0000001"; -- 0
            when 1 => temp := "1001111"; -- 1
            when 2 => temp := "0010010"; -- 2
            when 3 => temp := "0000110"; -- 3 
            when 4 => temp := "1001100"; -- 4
            when 5 => temp := "0100100"; -- 5
            when 6 => temp := "0100000"; -- 6
            when 7 => temp := "0001111"; -- 7
            when 8 => temp := "0000000"; -- 8 
            when 9 => temp := "0000100"; -- 9 
        end case;
        return temp;
    end decod;
end package body;

对于那些提供答案的人来说，看看实际的错误消息会很有用。

函数语法不编译 - VHDL

2 个答案: