VHDL初始化std_logic_vector的通用数组

时间:2017-11-22 13:39:28

标签: arrays generics initialization vhdl

我想在VHDL中为卷积内容实现一个环形缓冲区并使其成为通用的。我的问题是如何在不引入更多信号或变量的情况下初始化内部数据。

通常我可以通过

初始化std_logic_vector
signal initialized_vector : std_logic_vector(15 downto 0) := (others => '0');

但我不知道默认情况下如何在数组上执行此操作。

这是我的代码:

entity convolution_ringbuffer is
    generic (
        BitDepth_signal : integer := 24;
        BufferSize : integer := 10
        );
    port (
        data_in : in std_logic_vector(BitDepth_signal-1 downto 0);
        sclk : in std_logic;
        enable : in std_logic;
        data_out : out std_logic_vector(BitDepth_signal-1 downto 0)
        );
end convolution_ringbuffer;

architecture behavioral of convolution_ringbuffer is

    type internal_data is array(0 to BufferSize-1) of std_logic_vector(BitDepth_signal-1 downto 0);
    signal data_internal : internal_data;

begin

    process ( sclk ) 

        variable current_position : integer range 0 to (BufferSize-1) := 0;

    begin

        if ( rising_edge(sclk) and enable = '1' ) then

            data_internal(current_position) <= std_logic_vector(data_in);

            if ( current_position < BufferSize-1 ) then
                current_position := current_position + 1;    
            else
                current_position := 0;
            end if;

        end if;

        if ( falling_edge(sclk) ) then
            data_out <= std_logic_vector(data_internal(current_position));
        end if;

    end process;

end behavioral;

1 个答案:

答案 0 :(得分:0)

您可以执行与std_logic_vector几乎相同的操作。你只需要考虑另外一个维度:

GridLengthConverter converter = new GridLengthConverter();
foreach (var row in doc.Root.Elements("RowDefinition"))
{
    string height = row.Attribute("Height").Value;
    TheGrid.RowDefinitions.Add(new RowDefinition() { Height = (GridLength)converter.ConvertFrom(height) });
}

如果要存储更复杂的初始化数据,可以使用初始化函数:

signal data_internal : internal_data := (others=>(others=>'0'));