我目前正致力于逻辑综合 - 给出了硬件的高级描述,我希望将其转换为门,触发器等电路。 我对这个理论不是很熟悉。我搜索了互联网,但大多数都是指在线书店。 有人可以请我参考网上任何好的教程吗?...任何有关它的帮助将不胜感激。 谢谢!
关心, Adwaitvedant Mathkar
答案 0 :(得分:1)
这里可以找到流动底漆:
先进的ASIC芯片合成使用Synopsys®DesignCompiler®PhysicalCompiler®和Primeima®,Himanshu Bhatnagar。
这是一本旧书,所以可能有更新的东西。
在Google Books和Amazon上提供。
如果你想要一些简单的原型使用PAL或FPGA,那么实现这些东西适用于大公司。参见Altera,Xilinx等。
大多数大学都可以使用这些或类似的工具。
答案 1 :(得分:0)
我在海法大学的Nadav Rotem的2010 LLVM Developers' Meeting找到了相关的演讲,标题为“C-to-Verilog.com:使用LLVM进行高级综合”。我认为值得在presentation(slides here)上查看他的想法。
我知道的只是一点点但关于那些东西,但试着谷歌那个人,或电子邮件作者,他可能是一个好人问。
答案 2 :(得分:0)
与这些内容相关的基础知识,请参阅Thomas H. Cormen,Charles E. Leiserson,Ronald L. Rivest,Clifford Stein撰写的“算法导论”。
有些算法与电路,硬件设计有关,如分拣网络,算术电路,逻辑电路的可满足性。
我没有深入研究“逻辑综合”,因此这个答案仅基于直觉,与上述主题相关的算法知识可能有用。
答案 3 :(得分:0)
要了解逻辑综合技术的最新进展,请查阅设计自动化会议(DAC)和国际计算机辅助设计会议(ICCAD)的最新会议记录中的相关论文。
现代逻辑综合工具支持基于多数门的“特定于域”的数据结构(和算法),例如多数逆变器图(MIG),XOR-AND图(XAG)和XOR-多数图(XMG) 。参见https://doi.org/10.1145/3316781.3317905。
有关https://github.com/lsils/lstools-showcase的信息,请参见位于瑞士洛桑的EPFL(洛桑联邦理工学院)的最新逻辑综合库。
一个不太现代的解决方案是加利福尼亚大学伯克利分校的“ ABC”。它基于AND反相器图(AIG)。参见https://people.eecs.berkeley.edu/~alanmi/abc/。不幸的是,有关电子设计自动化的书籍仅提供了一部分,甚至没有一章。优化AIG的大多数参考文献是会议论文(或期刊),或研究会议论文集(尤其是DAC和ICCAD,以及DATE-欧洲设计,自动化和测试会议)上的论文/文章,以及研究期刊(尤其是ACM和IEEE)。
以下是一些BibTeX条目,这些条目提供了有关对您有帮助的书籍的信息。
用于现代逻辑综合...
@book{Reis2018,
Address = {Cham, Switzerland},
Author = {Andr{\'{e}} In{\'{a}}cio Reis and Rolf Drechsler},
Doi = {https://dx.doi.org/10.1007/978-3-319-67295-3},
Publisher = {Springer International Publishing {AG}},
Title = {Advanced Logic Synthesis},
Year = {2018}}
@book{Amaru2017,
Address = {Cham, Switzerland},
Author = {Luca Gaetano Amaru},
Doi = {https://dx.doi.org/10.1007/978-3-319-43174-1},
Publisher = {Springer International Publishing Switzerland},
Title = {New Data Structures and Algorithms for Logic Synthesis and Verification},
Volume = {},
Year = {2017}}
@phdthesis{Amaru2015,
Address = {Lausanne, Switzerland},
Author = {Luca Gaetano Amar{\`{u}}},
Doi = {https://dx.doi.org/10.5075/epfl-thesis-6863},
Howpublished = {Available online at: \url{https://dx.doi.org/10.5075/epfl-thesis-6863}; December 8, 2017 was the last accessed date},
Month = {December 18},
School = {Swiss Federal Institute of Technology in Lausanne},
Title = {New Data Structures and Algorithms for Logic Synthesis and Verification},
Url = {https://dx.doi.org/10.5075/epfl-thesis-6863},
Year = {2015}}
对于基于二进制决策图(BDD)的较旧的逻辑综合...
@book{Ebendt2005,
Address = {Dordrecht, {The Netherlands}},
Author = {R{\"{u}}diger Ebendt and G{\"{o}}rschwin Fey and Rolf Drechsler},
Doi = {https://dx.doi.org/10.1007/b107399},
Publisher = {Springer},
Title = {Advanced {BDD} Optimization},
Year = {2005}}
@book{Hachtel1996,
Address = {New York, {NY}},
Author = {Hachtel, Gary D. and Somenzi, Fabio},
Doi = {https://dx.doi.org/10.1007/0-387-31005-3},
Publisher = {Springer Science+Business Media, {LLC}},
Title = {Logic Synthesis and Verification Algorithms},
Url = {https://dx.doi.org/10.1007/0-387-31005-3},
Year = {1996}}
@book{DeMicheli1994,
Address = {New York, {NY}},
Author = {{De Micheli}, Giovanni},
Publisher = {McGraw-Hill},
Series = {McGraw-Hill Series in Electrical and Computer Engineering},
Title = {Synthesis and Optimization of Digital Circuits},
Year = {1994}}
@book{Hassoun2002,
Address = {Norwell, {MA}},
Author = {Hassoun, Soha and Sasao, Tsutomu},
Doi = {https://dx.doi.org/10.1007/978-1-4615-0817-5},
Publisher = {Kluwer Academic Publishers},
Series = {The Kluwer International Series in Engineering and Computer Science},
Title = {Logic Synthesis and Verification},
Url = {https://dx.doi.org/10.1007/978-1-4615-0817-5},
Year = {2002}
评论文章,调查论文/“论文”和文献评论:
@book{Lavagno2016a,
Address = {Boca Raton, {FL}},
Author = {Luciano Lavagno and Igor L. Markov and Grant Martin and Louis K. Scheffer},
Doi = {https://dx.doi.org/10.1201/b19569},
Edition = {Second},
Publisher = {{CRC} Press},
Series = {Electronic Design Automation for Integrated Circuits Handbook},
Title = {Electronic Design Automation for {IC} System Design, Verification, and Testing},
Volume = {1},
Year = {2016}}
“用于已建立和正在出现的计算的逻辑综合”文献评论文章(DOI:https://doi.org/10.1109/JPROC.2018.2869760)。
基于BDD和ESPRESSO的其他内容已过时。