我对VHDL相当陌生,我正在从给出的代码中运行一些代码片段,以查看其功能。我想在控制台中看到一个自定义数组类型,但是在尝试编写时会出错。
entity hello_world is
end entity hello_world;
library STD;
library IEEE;
use IEEE.std_logic_1164.all;
use STD.textio.all;
use IEEE.std_logic_textio.all;
use IEEE.numeric_std.all;
architecture test of hello_world is
type row_type is array(0 to 2) of std_logic_vector(3 downto 0);
type new_type is array(0 to 1) of row_type;
signal max_new : new_type := (others => (others => (others => '0')));
begin
my_print : process is
variable my_line : line;
begin
write(my_line, string'("Value of max_new"));
write(my_line, max_new);
writeline(output, my_line);
wait;
end process my_print;
end architecture test;
运行模拟时出现的错误是:
错误:在“ max_new”附近输入错误:预期类型为“ std_ulogic”。错误:模式inout的正式“ l”必须具有关联的实际值。错误:正式的“值”没有实际值或默认值。错误:索引名称前缀类型“ void”不是数组类型
如果我理解正确,则行类型是大小为3的数组,在每个位置,我都有一个由4位组成的向量。 new_type是一个大小为2的数组,在每个位置我都有一个row_type,它是一个大小为3的数组,每个位置都有4位向量。它是否正确?由于将其初始化为0,所以我只希望看到它。
我正在使用Vivado 2018.3进行仿真。
任何帮助将不胜感激!
答案 0 :(得分:1)
您还可以编写自己的写过程:
entity hello_world is
end entity hello_world;
-- library STD;
library IEEE;
use IEEE.std_logic_1164.all;
use STD.textio.all;
use IEEE.std_logic_textio.all;
-- use IEEE.numeric_std.all;
architecture test of hello_world is
type row_type is array(0 to 2) of std_logic_vector(3 downto 0);
type new_type is array(0 to 1) of row_type;
signal max_new : new_type := (others => (others => (others => '0')));
procedure write (l: inout line; new_type_val: in new_type) is
begin
write (l, string'("("));
for i in new_type'range loop
write (l, string'("("));
for j in row_type'range loop
write (l, string'(""""));
write(l, new_type_val(i)(j));
write (l, string'(""""));
if j /= row_type'right then
write(l, string'(","));
end if;
end loop;
write (l, string'(")"));
if i /= new_type'right then
write(l, string'(","));
end if;
end loop;
write (l, string'(")"));
end procedure;
begin
my_print:
process is
variable my_line: line;
begin
write(my_line, string'("Value of max_new = "));
write(my_line, max_new);
writeline(output, my_line);
wait;
end process my_print;
end architecture test;
ghdl -r hello_world
Value of max_new = (("0000","0000","0000"),("0000","0000","0000"))
使用预先存在的写过程重载作为构建块。
答案 1 :(得分:0)
std.textio的函数 write 可以将以下参数作为值(https://www.hdlworks.com/hdl_corner/vhdl_ref/VHDLContents/TEXTIOPackage.htm):
IEEE.std_logic_textio添加std_logic及其派生到此列表中,但 write 不能处理Array。
您可以这样打印数组:
my_print : process is
variable my_line : line;
begin
write(my_line, string'("Value of max_new"));
for I in 0 to 1 loop
for J in 0 to 2 loop
write(my_line, max_new(I)(J));
end loop;
end loop;
writeline(output, my_line);
wait;
end process my_print;