Question

我要在Altera GX入门套件上设置adv7513。设置后，我从寄存器中读取的数据与我发送的数据不同。

我试图将写入划分为单个寄存器而不是一个长事务，并更改写入和读取的顺序，但是我总是从其余寄存器中读取0x98中的0x03和其余寄存器中的0x00。

我使用了以下i2c控制器：https://www.digikey.com/eewiki/pages/viewpage.action?pageId=10125324

我已经在vhdl中制作了状态机来控制它，并写入rom中存储的数据

if rising_edge(clk) then

    case state is
    when idle =>
        if (beg='1') then
        state <= start;
        else
        state <= idle;
        end if;
    when start =>
        rom_addr <= count;
        state <= lut_addr_i2c;
    when lut_addr_i2c =>
        ena <= '1'; 
        rw <= '0';
        addr <= "0111001";
        data_wr <= lut_data(15 downto 8);
        state <= lut_data_i2c;
    when lut_data_i2c =>
        if (busy='1' and busy_prev='0') then
        data_wr <= lut_data(7 downto 0);
        state <= cleanup;
        count <= count+1;
        end if;
    when cleanup =>
        if (busy='1' and busy_prev='0') then
        state <= next_lut;
        end if;
    when next_lut =>
        if (count = 31) then
        state <= rd;
        ena <= '0';
        else 
        state <= start;
        end if;
    when rd =>
        ready <= '1';
        count <= 0;
        if (rd_delay = 10000) then
        state <= start_rd;
        else 
        rd_delay <= rd_delay+1;
        state <= rd;
        end if;
    when start_rd =>
        rom_addr <= count;
        if (next_rd = 20000) then
        state <= rd_lut_addr;
        next_rd <= 0;
        else 
        next_rd <= next_rd+1;
        state <= start_rd;
        end if;
    when rd_lut_addr =>
        ena <= '1'; 
        rw <= '0';
        addr <= "0111001";
        data_wr <= lut_data(15 downto 8);
        state <= rd_lut;
    when rd_lut =>
        if (busy='1' and busy_prev='0') then
        rw <= '1';
        count <= count+1;
        state <= rd_cleanup;
        end if;
    when rd_cleanup =>
        if (busy='1' and busy_prev='0') then
        state <= rd_next_lut;
        end if;
    when rd_next_lut => 
        if (count = 31) then
        state <= fin;
        ena <= '0';
        else 
        state <= start_rd;
        ena <= '0';
        end if;
    when fin =>
        state <= fin;
    end case;
    end if;

signal tap, what I write

signal tap, what I read

Answer 1

我认为您的问题是您只是超载了i2c从站。提供第二个数据字节之后，您应该最晚等待not busy处于清理状态。

您的代码似乎根本没有等待not busy吗？

如何设置adv7513？

1 个答案: