如何编写代码以跳过上升沿并继续计数直到在vhdl中检测到第二个上升沿

Question

我需要设计一个系统以跳过特定的上升沿并继续计数，直到检测到下一个上升沿，因为检测到下一个上升沿，它应从零开始计数。val1，val2，val3具有不同脉冲计数来自外部场的通讯。 我留下第一个脉冲来计数每个脉冲，如果计数大于或小于计数，则检测到第二个脉冲序列，它应跳过上升沿并移至下一个上升沿并开始计数。 我已经尝试过这种方式..

library ieee; 
use ieee.std_logic_1164.all; 
use ieee.std_logic_unsigned.all; 
use IEEE.Numeric_Std.all;
library work;
use work.all;

--use IEEE.NUMERIC_STD.ALL;



entity nxt_pwm is
  Port (  i_clk : in std_logic;
           signal_in: in std_logic;
            signal_in1: in std_logic;
        pwm_out: out std_logic);
end nxt_pwm;

architecture Behavioral of nxt_pwm is
  signal Q1,Q2,Q3 : unsigned(15 downto 0);

  signal reset,flag1,flag2,flag3,flag4: std_logic;
  signal val1,val2,val3:unsigned (15 downto 0); 
  signal cnt_f,count_q: unsigned (15 downto 0);
  signal  val_tot: unsigned (15 downto 0) ; 

begin
pulse_count:entity work.pulse port map(i_clk=>i_clk,signal_in1=>signal_in1,pwm_out=>pwm_out);

 uut3:   process (signal_in)
    --- variable    count_q : unsigned  (15 downto 0);
   --  variable reset: std_logic;   
           --  variable val_tot: unsigned (15 downto 0) ;              

                           begin
                           if rising_edge(signal_in) then
                           if (flag1 = '1') then
                            Q1 <= val2;

                            elsif (flag2 = '1') then
                             Q2 <= val1;

                             elsif (flag3 = '1') then
                            Q3 <= val3;

                            end if;



                            if (reset = '1') then
                            count_q <= "0000000000000000";
                           if (flag1 = '1') then
                           count_q <= val2;
                           count_q <= count_q - 1;      
                           if (signal_in'event and signal_in = '1') then
                            -- count_q <= count_q - 1;
                            end if;
                            elsif (flag2='1') then
                            count_q<=val1;
                            count_q <=count_q - 1;
                             if reset='0' then
                             if (signal_in'event and signal_in = '1') then
                                    -- count_q<= count_q -1 ;
                                  reset<='1';
                                  if (signal_in'event and signal_in = '1') then
                                  count_q<="0000";
                                  end if;
                  end if;
                  end if;                
                              elsif (flag3='1') then
                              count_q <=val3;
                           count_q <= count_q - 1;      
                           if (signal_in'event and signal_in = '1') then
                              flag1<='1';
                            end if;
                  end if;
                  end if;
                  end if;          

                          end process;

    UUT2:  process (i_clk,signal_in)
     begin


                             if rising_edge(signal_in) then
                             if flag1<='1' or flag2<='1' or flag3<='1' then
                            if (cnt_f /= val_tot)then
                            if (cnt_f< (val_tot/2)) then
                            pwm_out<='1';
                            else
                            pwm_out<='0';
                            end if;
                            cnt_f<=cnt_f+1;
                            end if;
                            end if;
                            END IF;
                        end process;
end Behavioral;