系统Verilog嵌套关联数组

时间:2019-04-16 15:40:23

标签: associative-array system-verilog

如何在System Verilog中声明一个嵌套嵌套的关联数组?

/*
  Creating an associative array(AA) called timings such that
  each key contains an AA with a list of relevant key value pairs
*/
typedef string timingObj [string];
timingObj timings [string] = {"A": {"B" : "C"}, "X": {"Y" : "Z"} };
//string timings [timingObj] = {"A": {"B" : "C"}, "X": {"Y" : "Z"} }; //Same error

timingObj t;
$cast(t, timings["A"]); // t = {"B" : "C"}
$display("%s", timings["A"]);
$display("%s", t["B"]);

上面的代码会导致编译器错误

"Syntax error. Unexpected token: }. Expected tokens: ':'." "testbench.sv" 2
"Syntax error. Unexpected token: $cast[_SYSTEM_CAST]. Expected tokens: ';' , 'checker' , 'function' , 'task' , 'timeprecision' ... ." "testbench.sv" 6  6

1 个答案:

答案 0 :(得分:2)

关联数组的分配模式需要在前面带有'{}标记才能将其与串联{}区分开。在某些情况下,它是模棱两可的(但在这里不是)。所以写

timingObj timings [string] = '{"A": '{"B" : "C"}, "X": '{"Y" : "Z"} };