mplabx ide v5.10版本配置失败...如何调整?

时间:2019-02-16 15:34:02

标签: assembly microchip mplab

I take these errors when making clean and build or debug

**`list P = 18F45K22,r = dec,n = 0      #include

 ;   /* setup to use the 4xPLL with a 16MHz internal oscillator for a 64MHz system clock */

     config FOSC = INTIO67       ;/* Internal oscillator block, port function on RA6 and RA7          */
     config PLLCFG = ON          ;/* Oscillator multiplied by 4                                       */
     config PRICLKEN = ON        ;/* Primary clock is always enabled                                  */
     config HFOFST = OFF         ;/* HFINTOSC delayed by the oscillator stable status                 */
     config FCMEN = OFF          ;/* Fail-Safe Clock Monitor disabled                                 */
     config IESO = ON            ;/* Oscillator Switchover mode enabled                               */
     config PWRTEN = ON          ;/* Power up timer enabled                                           */
     config BOREN = OFF          ;/* Brown-out Reset disabled in hardware and software                */
     config BORV = 190           ;/* VBOR set to 1.90 V nominal                                       */
                                 ;
     config WDTEN = OFF          ;/* Watch dog timer is always disabled. SWDTEN has no effect.        */
     config WDTPS = 32768        ;/* 1:32768                                                          */
     config CCP2MX = PORTC1      ;/* CCP2 input/output is multiplexed with RC1                        */
     config CCP3MX = PORTB5      ;/* P3A/CCP3 input/output is multiplexed with RB5                    */
     config PBADEN = OFF         ;/* PORTB<5:0> pins are configured as digital I/O on Reset           */
     config T3CMX = PORTC0       ;/* T3CKI is on RC0                                                  */
     config P2BMX = PORTC0       ;/* P2B is on RC0                                                    */
     config LVP = OFF            ;/* Single-Supply ICSP disabled                                      */
     config STVREN = ON          ;/* Stack full/underflow will cause Reset                            */
     config MCLRE = INTMCLR      ;/* RE3 input pin enabled; MCLR disabled                             */
     config XINST = OFF          ;/* Instruction set extension and Indexed Addressing mode disabled   */

 ;   /* Turn off all code protection */
     config CP0   = OFF, CP1   = OFF, CP2   = OFF, CP3   = OFF, CPB   = OFF, CPD   = OFF
     config WRT0  = OFF, WRT1  = OFF, WRT2  = OFF, WRT3  = OFF, WRTB  = OFF, WRTC  = OFF
     config EBTR0 = OFF, EBTR1 = OFF, EBTR2 = OFF, EBTR3 = OFF, EBTRB = OFF

        org 0h
        MOVLW 40H; move 40H into WREG
    MOVWF 30H; move WREG into fileReg loc 30H
    MOVLW D'127'; move D'127' or 7F into Wreg
    MOVWF 31H; move WREG into fileRge loc 31H
    SUBWF 30H,W; subtract fileReg loc 30H and WREG 

        end

`** 这是我的代码。我是编码汇编的新手。我该如何监管?

1 个答案:

答案 0 :(得分:0)

删除一个源文件。 您尝试将两个文件链接在一起,但我猜您在两个文件中都设置了配置。