我想进行双向总线的条件批量连接,其概念如下所示。
val io = IO(new Bundle {
val master = Decoupled(UInt(8.W))
val slave0 = Flipped(Decoupled(UInt(8.W)))
val slave1 = Flipped(Decoupled(UInt(8.W)))
val select = Input(Bool())
})
when (select) {
io.slave0 <> io.master
io.slave1 <> some_null_decoupled
}.otherwise {
io.slave1 <> io.master
io.slave0 <> some_null_decoupled
}
这比必须单独描述io.master.ready
,io.slave0.bits
,io.slave0.valid
等信号的逻辑要干净。
是否存在与此语法类似的语法?当我在代码中尝试此操作时,会收到很多firrtl.passes.CheckInitialization$RefNotInitializedException
消息。
答案 0 :(得分:1)
我怀疑问题与mutate(df, sum = a+b)
的描述有关。除了缺少some_null_decoupled
的事实之外,这看起来还不错。以下对我来说很好(使用Chisel 3.1.6):
some_null_decoupled
这完全有帮助吗?否则,您能否提供更多信息,例如import chisel3._
import chisel3.util._
class ConditionalBulkConnect extends Module {
val io = IO(new Bundle {
val master = Decoupled(UInt(8.W))
val slave0 = Flipped(Decoupled(UInt(8.W)))
val slave1 = Flipped(Decoupled(UInt(8.W)))
val select = Input(Bool())
})
val some_null_decoupled = Wire(Decoupled(UInt(8.W)))
some_null_decoupled.ready := false.B
when (io.select) {
io.slave0 <> io.master
io.slave1 <> some_null_decoupled
}.otherwise {
io.slave1 <> io.master
io.slave0 <> some_null_decoupled
}
}
object ConditionalBulkConnectTop extends App {
chisel3.Driver.execute(args, () => new ConditionalBulkConnect)
}
的实现和Chisel的版本?