Question

在《计算机系统体系结构》（《莫里斯·玛诺》）的第5章中，这本书使用了一个简单的微处理器，该微处理器具有以下指令周期：

例如LDA操作：

AR <--- PC（T0）

IR <--- M [AR]（T1）

PC <--- PC + 1（T1）

解码（T2）

DR <--- M [AR]（T3）

AC <--- DR（T4）

我很难理解这个周期以及为什么它不是这样：

MAR <-PC（T0）

MBR <-M（MAR）（T1）

解码（IR <--- MBR）（T2）

MBR <-M（MAR]（T3）

AC <--- MBR（T4）

我的问题是：

为什么书中没有使用MBR和MAR表示法，以及由于写入操作需要读取操作的结果，如何同时执行“从内存读取”和“写入IR”操作？

Answer 1

没有MBR或MAR寄存器，设计中只有以下寄存器（忽略中断和IO功能）：

AR-地址寄存器；用于寻址内存

PC-程序计数器；正在执行的指令的地址

DR-数据寄存器；临时存储数据

AC-累加器；任何ALU操作的结果都在该寄存器中结束

IR-指令寄存器；当前指令操作码的存储

E-ALU操作中的标志寄存器

SC-序列计数器；用于确定要执行指令的哪一步

例如，流过LDA指令：

T0: AR <- PC // Put the Program counter into the Address register so we can get the instruction; only the Address regsiter can access memory

T1: IR <- M[AR], PC <- PC + 1 // M[AR] means access memory (M) at address stored in AR ([AR]), and in this case put that value at address AR into the Instruction register; at the same time increment the Program counter which can be done in parallel as the increment can be done without using the bus

T2: Decode(IR); AR <- IR(0-11) // Now the instruction is decoded; during this time the address argument of the instruction is pass into the Address register

T3: DR <- M[AR] // Once weve determined in T2 that this is a LDA, we need to do the steps involved; the goal being to take the word from memory and get it into AC. To do this, we first need to read it out of memory, thus the M[AR], read memory at address AR (which is from the instruction became of the transfer we did in T2). We want to put it into AC, but since AC cannot be loaded from the bus directly, we need to put it somewhere else first, somewhere it can be then transferred to AC, thus put it in DR

T4: AC <- DR; SC <- 0 // Now that the data is in DR, we can move it via the ALU into AC; note that the ALU doesnt actually do any work on the data in the case of the LDA, it just passes the data through. Now that the instruction is done, reset the Sequence counter to 0

在指令周期的获取阶段，事物如何工作？

1 个答案: