作为一个例子，在第一个进程中，我有一个二进制数，我想将其转移到第二个进程中。我该怎么做？
我需要使用一种称为FIFO的东西吗？
如果需要使用FIFO，必须使用吗？有其他选择吗？
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity pwm_control_1 is
port (
--inputs and outputs for clock divider-------------------------------------------------------
clk_in : in std_logic ;
clr : in std_logic;
pwm_testing: out bit;
pwm_out: out bit;
key_0:in bit;
green_led:out bit
);
end pwm_control_1;
architecture Behavioral of pwm_control_1 is
signal compare:std_logic_vector( 8 downto 0);
signal q:std_logic_vector (8 downto 0);-- q is for the clock divider ,q can get till 23
signal q_1:std_logic_vector (23 downto 0);
signal pwm_testing_signal : bit;
signal test : std_logic_vector(8 downto 0);
signal step_10_dc : std_logic_vector(8 downto 0);
signal step_5_dc : std_logic_vector(8 downto 0);
signal duty_cycle_0 : std_logic_vector(8 downto 0);
signal duty_cycle_counter : std_logic_vector(8 downto 0);
signal duty_cycle_counter_refresh : std_logic_vector(8 downto 0);
begin
test <= "000000000";
step_10_dc <= "000110011";
step_5_dc <= "000011010";
duty_cycle_counter <= "000000000";
duty_cycle_counter_refresh <= "000000000";
--
key_testing :process (key_0)
begin
if (key_0='0') then
green_led <='1';
duty_cycle_counter <= (duty_cycle_counter+step_5_dc);-- counter for adding the limit of the PWM
else
green_led <='0';
end if;
end process key_testing;
` duty_cycle_counter_refresh <=duty_cycle_counter;
add_5_or_10_duty_cycle :process(clk_in,clr,q ,key_0)
begin
if (clk_in'event and clk_in='1') then -- starting the q counter
q<= q+1; --first I torn on the counter q that is used for clock driver then
if (q<=(duty_cycle_counter_refresh )) then pwm_testing_signal <='1';
else
pwm_testing_signal <='0';
end if ;
end if;
end process add_5_or_10_duty_cycle;
pwm_testing <=pwm_testing_signal;
end Behavioral;