用于更改UART模式并为iMX6ULL模块上系统启用GPIO的设备树

时间：2018-08-16 19:44:30

标签： linux uart gpio device-tree imx6

我在自定义板上使用iMX6ULL模块上的系统。

我正在为定制板的UART和GPIO苦苦挣扎。我已经解决了板上的SPI问题，但是后来我知道了板上的另一个问题，这就是为什么我想问一个新问题。

我能够为我的板激活所需的UART端口和SPI端口。但是我知道，焊接在定制板上的外围传感器交换了TX和RX线。我试图用UART5修改来交换imx6ull soc的device tree的tx rx引脚。为此，我尝试为uart5启用DCE Mode（默认情况下，colibri模块已激活DTE模式）。但是，当我在上层pinctrl-0文件中定义（重新定义）pinctrl-name和dts属性时，/dev/目录下的uart tty端口就会消失。我试图将pinctrl-0指向pinctrl_uart5_their和pinctrl_uart5_own。 pinctrl_uart5_their是pinctrl_uart5文件中定义的imx6ull-colibri.dtsi的副本。但是/dev/目录下的uart端口消失了。如果我注释掉pinctrl属性（这意味着这些属性来自包含文件），则会显示uart端口。

GPIOs也无法正常工作。我尝试通过在toradex开发人员站点上遵循guide并通过使用适当的命令更改方向后写入1和0来导出它们来进行测试，但由于输出未反映在引脚上，因此它对我不起作用。 / p>

请验证我的设备树并建议我正确的方法来帮助我。

设备树在这里：

/dts-v1/;
#include "imx6ull-colibri-nonwifi.dtsi"
#include "imx6ull-colibri-eval-v3.dtsi"

/ {
    model = "Toradex Colibri iMX6ULL 256MB on Colibri Evaluation Board V3";
    compatible = "toradex,colibri_imx6ull-eval", "fsl,imx6ull";


    gpio_additional {
        pinctrl-name = "default";
        pinctrl-0 = <&pinctrl_additionalgpio>;
        status = "okay";
    };
};


&iomuxc {
    imx6ull-colibri {
        pinctrl_additionalgpio: additionalgpios {
            fsl,pins = <
                MX6UL_PAD_UART2_RTS_B__GPIO1_IO23 0x14      // Pin 34 => GPS SafeBoot
                MX6UL_PAD_CSI_DATA00__GPIO4_IO21  0x14      // Pin 101 => 1V8 Power Supply Enable
                MX6UL_PAD_LCD_ENABLE__GPIO3_IO01  0x14      // Pin 44 => GPS EXINT
                MX6UL_PAD_LCD_DATA07__GPIO3_IO12  0x14      // Pin 46 => GPS RST
                MX6UL_PAD_LCD_DATA09__GPIO3_IO14  0x14      // Pin 48 => UNUSED
                MX6UL_PAD_LCD_DATA06__GPIO3_IO11  0x14      // Pin 80 => SX1301 RST
            >;
        };
    };

    pinctrl_uart5_their: uart5grp_their {
        fsl,pins = <
            MX6UL_PAD_GPIO1_IO04__UART5_DTE_RX  0x1b0b1
            MX6UL_PAD_GPIO1_IO05__UART5_DTE_TX  0x1b0b1
        >;
    };

    pinctrl_uart5_own: uart5grp_own {
        fsl,pins = <
            MX6UL_PAD_GPIO1_IO05__UART5_DCE_RX  0x1b0b1
            MX6UL_PAD_GPIO1_IO04__UART5_DCE_TX  0x1b0b1
        >;
    };
};


&uart1 {
    status = "okay";
};

&uart2 {
    status = "okay";
    /delete-property/fsl,dte-mode;
    fsl,dce-mode;
};

&uart3 {
    status = "disabled";
};

&uart4 {
    status = "disabled";
};

&uart5 {
    status = "okay";

    pinctrl-name = "default";
    pinctrl-0 = <&pinctrl_uart5_own>;

    /delete-property/fsl,dte-mode;
    fsl,dce-mode;
};


&ecspi1 {
    status = "okay";
};

&i2c1 {
    status = "okay";

    /* M41T0M6 real time clock on carrier board */
    rtc: m41t0m6@68 {
        status = "disabled";
    };
};


&pwm1 {
    status = "okay";
};

&pwm2 {
    status = "okay";
};


&lcdif {
    status = "disabled";
};

&ecspi1 {
    status = "okay";
};

&mcp258x0 {
    status = "disabled";
};

&spidev0 {
    status = "okay";
};

编辑：

我已经解决了UART端口消失的问题。问题出在我的设备树上，因为我的pinctrl_uart5_their节点不在imx6ull-colibri节点下（请参阅上面的设备树中的iomuxc）。

但是我不能用DTB交换UART5的TX RX引脚。我发现很少有帖子说这是可能的。同样，即使遵循了guide，GPIO也无法正常工作。在下面找到我的终端的快照：

root@colibri-imx6ull:~# echo 75 > /sys/class/gpio/export                        
root@colibri-imx6ull:~# echo "out" > /sys/class/gpio/gpio75/direction           
root@colibri-imx6ull:~# echo 1 > /sys/class/gpio/gpio75/value                   
root@colibri-imx6ull:~# echo 1 > /sys/class/gpio/gpio75/value                   
root@colibri-imx6ull:~# echo 0 > /sys/class/gpio/gpio75/value                   
root@colibri-imx6ull:~# echo 1 > /sys/class/gpio/gpio75/value                   
root@colibri-imx6ull:~# cat /sys/kernel/debug/gpio                              
gpiochip0: GPIOs 0-31, parent: platform/209c000.gpio, 209c000.gpio:             
 gpio-2   (                    |VCC_USB[1-4]        ) out lo                    
 gpio-11  (                    |enable              ) out hi                    

gpiochip1: GPIOs 32-63, parent: platform/20a0000.gpio, 20a0000.gpio:            

gpiochip2: GPIOs 64-95, parent: platform/20a4000.gpio, 20a4000.gpio:            
 gpio-75  (                    |sysfs               ) out hi                    
 gpio-90  (                    |spi_imx             ) out hi                    

gpiochip3: GPIOs 96-127, parent: platform/20a8000.gpio, 20a8000.gpio:           

gpiochip4: GPIOs 128-159, parent: platform/20ac000.gpio, 20ac000.gpio:          
 gpio-128 (                    |cd                  ) in  lo                    
 gpio-129 (                    |Wake-Up             ) in  lo                    
 gpio-130 (                    |id                  ) in  lo

SODIMM引脚中的80引脚对应于内核编号75。

最新设备如下：

/ dts-v1 /; 

#include "imx6ull-colibri-nonwifi.dtsi"
#include "imx6ull-colibri-eval-v3.dtsi"

/ {
    model = "Toradex Colibri iMX6ULL 256MB on Colibri Evaluation Board V3";
    compatible = "toradex,colibri_imx6ull-eval", "fsl,imx6ull";


    gpio_additional {
        pinctrl-name = "default";
        pinctrl-0 = <&pinctrl_additionalgpio>;
        status = "okay";
    };
};


&iomuxc {
    imx6ull-colibri {
        pinctrl_additionalgpio: additionalgpios {
            fsl,pins = <
                MX6UL_PAD_UART2_RTS_B__GPIO1_IO23 0x14          // Pin 34 => GPS SafeBoot
                MX6UL_PAD_CSI_DATA00__GPIO4_IO21  0x14          // Pin 101 => 1V8 Power Supply Enable
                MX6UL_PAD_LCD_ENABLE__GPIO3_IO01  0x14          // Pin 44 => GPS EXINT
                MX6UL_PAD_LCD_DATA07__GPIO3_IO12  0x14          // Pin 46 => GPS RST
                MX6UL_PAD_LCD_DATA09__GPIO3_IO14  0x14          // Pin 48 => UNUSED
                MX6UL_PAD_LCD_DATA06__GPIO3_IO11  0x14          // Pin 80 => SX1301 RST
            >;
        };


        pinctrl_uart5_their: uart5grp_their {
            fsl,pins = <
                MX6UL_PAD_GPIO1_IO04__UART5_DTE_RX  0x1b0b1
                MX6UL_PAD_GPIO1_IO05__UART5_DTE_TX  0x1b0b1
            >;
        };

        pinctrl_uart5_own: uart5grp_own {
            fsl,pins = <
                MX6UL_PAD_GPIO1_IO04__UART5_DCE_TX  0x1b0b1
                MX6UL_PAD_GPIO1_IO05__UART5_DCE_RX  0x1b0b1
            >;
        };

    };
};


&uart1 {
    status = "okay";
};

&uart2 {
    status = "okay";
    /delete-property/fsl,dte-mode;
    fsl,dce-mode;
};

&uart3 {
    status = "disabled";
};

&uart4 {
    status = "disabled";
};

&uart5 {
    status = "okay";

    pinctrl-name = "default";
    pinctrl-0 = <&pinctrl_uart5_own>;

    // /delete-property/fsl,dte-mode;
    // fsl,dce-mode;
};


&ecspi1 {
    status = "okay";
};

&i2c1 {
    status = "okay";

    /* M41T0M6 real time clock on carrier board */
    rtc: m41t0m6@68 {
        status = "disabled";
    };
};


&pwm1 {
    status = "okay";
};

&pwm2 {
    status = "okay";
};


&lcdif {
    status = "disabled";
};

&ecspi1 {
    status = "okay";
};

&mcp258x0 {
    status = "disabled";
};

&spidev0 {
    status = "okay";
};

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