使用vhdl

时间:2018-06-03 03:23:02

标签: vhdl fpga lcd

我正在尝试在我自己的项目中使用LCD项目,但事实并非如此 完全理解这个项目,尤其是计数器,例如count1和count2 如果需要,我可以提供数据表! 我希望我能对此得到澄清,我理解当计数器达到一定数量时会发生什么,但我不明白的是这个数字代表的是什么! 我认为值得一提的是FPGA中使用的时钟是50MHz

代码是同伴

library ieee;
        use ieee.std_logic_1164.all;


entity display is
port(   clk         : in std_logic;                             
        rst         : in std_logic;                             
        byte_ready  : in std_logic;                             
        RS          : out std_logic;                                
        RW          : out std_logic;                                
        E           : out std_logic;                                
        DB          : out std_logic_vector(7 downto 0);     
        rxdata      : in std_logic_vector(7 downto 0) );

end entity display;


architecture rtl of display is
    signal cnt          : integer range 0 to 1000000;           -- init counter
    signal cnt2         : integer range 0 to 50000000;          -- counter that resets every time byte i recieved

begin
clk_gen : process(clk, cnt, rst)
begin
    if (rst = '0') then
        cnt  <= 0;
        cnt2 <= 0;
    else
        if rising_edge(clk) and cnt < 1000000 then
            cnt <= cnt + 1;
        elsif rising_edge(clk) and cnt = 1000000 then
            if (byte_Ready = '1') then
                cnt2 <= 0;
            end if;
            if (cnt2 < 5000000) then
                cnt2 <= cnt2 + 1;
            end if; 
        end if;
    end if;
end process clk_gen;

p_main : process(clk, rst)
begin
    if (rst = '1') then
        if rising_edge(clk) then
            case cnt is                 -- INIT
                when 100000 =>
                    RS <= '0';
                    RW <= '0';
                    E  <= '1';
                    DB <= "00111000";   -- function set  --kan ändras till 00111011 western eurpean #2
                when 140000 =>
                    E  <= '0';

                when 150000 =>
                    E  <= '1';
                    DB <= "00001011";   -- display off
                when 190000 =>
                    E <= '0';

                when 200000 =>
                    E  <= '1';
                    DB <= "00000001";   -- display clear
                when 300000 =>
                    E  <= '0';

                when 350000 =>
                    E  <= '1';
                    DB <= "00000110";   -- entry mode
                when 390000 =>
                    E  <= '0';

                when 400000 =>
                    E  <= '1';
                    DB <= "00000010";   -- home command
                when 440000 =>
                    E  <= '0';

                when 450000 =>
                    E  <= '1';
                    DB <= "00001111";   -- display on 
                when 490000 =>
                    E  <= '0';

                when 500000 =>
                    RS <= '0';
                    E  <= '1';
                    DB <= "00010000";   -- cursor shift left 
                when 550000 =>
                    E  <= '0'; 

                when 600000 =>
                    RS <= '1';
                    E  <= '1';
                    DB <= "10100000";   -- output space
                when 650000 =>
                    E  <= '0';

                when 700000 =>
                    RS <= '0';
                    E  <= '1';
                    DB <= "00010000";   -- cursor shift left
                when 750000 =>
                    E  <= '0'; 

            when others => null;
        end case;

        if (rxdata = "01111111") then   -- if input is backspace
                case cnt2 is
                    when 300000 =>
                        RS <= '0';
                        E  <= '1';
                        DB <= "00010000";       -- cursor shift left
                    when 350000 =>
                        E  <= '0';

                    when 400000 =>
                        RS <= '1';
                        E  <= '1';
                        DB <= "10100000";       -- output space
                    when 450000 =>
                        E  <= '0';

                    when 500000 =>
                        RS <= '0';
                        E  <= '1';
                        DB <= "00010000";   -- cursor shift left
                    when 550000 =>
                        E  <= '0';

                    when others => null;
                end case;
            elsif (rxdata = "00001101") then -- if input is enter
                case cnt2 is
                    when 300000 =>
                        RS <= '0';
                        E  <= '1';
                        DB <= "11000000";       -- go to second row 
                    when 350000 =>
                        E  <= '0';

                    when others => null;
                end case;
            else
                case cnt2 is    
                    when 300000 =>
                        RS   <= '1';
                        E    <= '1';
                        DB   <= rxdata;         -- output character
                    when 350000 =>
                        E    <= '0';

                    when others => null;
                end case;
            end if;
        end if;
    end if;
end process p_main;

end architecture rtl;

0 个答案:

没有答案