Question

我的核-F767zi板带有STM32F767zi芯片。我连接到芯片外部存储器IS25LP064。 QSPI设置为普通SPI（MISO，MOSI，SCK，CE）。

它运行正常，但是当我写入内存时，我无法重写它。我不知道为什么，因为 STATUS REGISTER和FUNCTION REGISTER设置为0 - 没关系。

在写入内存之前，我启用了写入内存。

并。我有这个功能：

QSPI_memory_multiwrite - 向内存写入4x以上的N字节
QSPI_memory_write - 将4个字节写入内存

计划步骤：

我写入数据存储块：

uint32_t testData[] = {0x01010101, 0x11111111, 0x22222222, 0x33333333, 0x44444444, 0x55556666, 0x77778888, 0x99990000, 0x12345678, 0x87654321};
QSPI_memory_multiwrite(PAGE_PROG_CMD, testData, 8, 0x00, ENABLE_DATA, ENABLE_ADDRESS, NO_DUMMY_CYCLE);

在此命令（QSPI_memory_multiwrite）之后，我尝试使用数据0x11114444重写地址0x00。但这失败了。

QSPI_memory_write(PAGE_PROG_CMD, 0x11114444, 4, 0x00, ENABLE_DATA , ENABLE_ADDRESS, NO_DUMMY_CYCLE);

这是我的2个功能。

void QSPI_memory_multiwrite(uint8_t instruction, uint32_t *data, uint32_t number_bytes, uint32_t addr, uint8_t enable_data, uint8_t enable_address, uint8_t dummy_cycle)
{
    uint32_t tmpreg = 0;

QUADSPI->FCR = 0; // clear all flag

/* Write the DLR Register */
if (!(QUADSPI->SR & QUADSPI_SR_BUSY))
{
    QUADSPI->DLR = (number_bytes*4)-1;
}

tmpreg = QUADSPI->CCR;
tmpreg &= 0x90800000;
tmpreg |=
        (0x00 << QUADSPI_CCR_DDRM_Pos)      |  // Disable DDR mode
        (0x00 << QUADSPI_CCR_DHHC_Pos)      |  // Delay the data output using analog delay
        (0x00 << QUADSPI_CCR_SIOO_Pos)      |  // Send instruction on every transaction
        (0x00 << QUADSPI_CCR_FMODE_Pos)     |  // function QSPI (0-indirect write); (1-indirect read)
        (enable_data << QUADSPI_CCR_DMODE_Pos)|// Data mode (0-nodata); (1-data on single line); .....
        (dummy_cycle << QUADSPI_CCR_DCYC_Pos) |// Dummy cycle
        (0x00 << QUADSPI_CCR_ABSIZE_Pos)    |  // size of alternate bytes (0-8bit); (1-16bit); (2-24bit); (3-32bit)
        (0x00 << QUADSPI_CCR_ABMODE_Pos)    |  // Alternate mode (0-no alternate); (1-alternate on single line)
        (0x02 << QUADSPI_CCR_ADSIZE_Pos)    |  // size of address bytes (0-8bit); (1-16bit); (2-24bit); (3-32bit)
        (enable_address << QUADSPI_CCR_ADMODE_Pos)  |  // Address mode (0-no address); (1-address on a single line)
        (0x01 << QUADSPI_CCR_IMODE_Pos )    |  // Instruction mode (0-no instruction); (1-instruction on signel line)
        (instruction << QUADSPI_CCR_INSTRUCTION_Pos); // Instruction send on SPI
 QUADSPI->CCR = tmpreg;
 while (!(QUADSPI->SR & QUADSPI_SR_FTF)) { };

 QUADSPI->AR = addr;

 while(number_bytes--)
 {
     QUADSPI->DR = *data++;
 }

 while (!(QUADSPI->SR & QUADSPI_SR_TCF)) { };
 while (QUADSPI->SR & QUADSPI_SR_BUSY) { };
}

void QSPI_memory_write(uint8_t instruction, uint32_t data, uint32_t data_lenght, uint32_t addr, uint8_t enable_data, uint8_t enable_address, uint8_t dummy_cycle)
{
    uint32_t tmpreg = 0;

    QUADSPI->FCR = 0; // clear all flag

    /* Write the DLR Register */
    if (!(QUADSPI->SR & QUADSPI_SR_BUSY))
    {
        if (data_lenght <= 0)
            QUADSPI->DLR = 0;
        else
            QUADSPI->DLR = data_lenght - 1;
    }

    tmpreg = QUADSPI->CCR;
    tmpreg &= 0x90800000;
    tmpreg |=
            (0x00 << QUADSPI_CCR_DDRM_Pos)      |  // Disable DDR mode
            (0x00 << QUADSPI_CCR_DHHC_Pos)      |  // Delay the data output using analog delay
            (0x00 << QUADSPI_CCR_SIOO_Pos)      |  // Send instruction on every transaction
            (0x00 << QUADSPI_CCR_FMODE_Pos)     |  // function QSPI (0-indirect write); (1-indirect read)
            (enable_data << QUADSPI_CCR_DMODE_Pos)|// Data mode (0-nodata); (1-data on single line); .....
            (dummy_cycle << QUADSPI_CCR_DCYC_Pos) |// Dummy cycle
            (0x00 << QUADSPI_CCR_ABSIZE_Pos)    |  // size of alternate bytes (0-8bit); (1-16bit); (2-24bit); (3-32bit)
            (0x00 << QUADSPI_CCR_ABMODE_Pos)    |  // Alternate mode (0-no alternate); (1-alternate on single line)
            (0x02 << QUADSPI_CCR_ADSIZE_Pos)    |  // size of address bytes (0-8bit); (1-16bit); (2-24bit); (3-32bit)
            (enable_address << QUADSPI_CCR_ADMODE_Pos)  |  // Address mode (0-no address); (1-address on a single line)
            (0x01 << QUADSPI_CCR_IMODE_Pos )    |  // Instruction mode (0-no instruction); (1-instruction on signel line)
            (instruction << QUADSPI_CCR_INSTRUCTION_Pos); // Instruction send on SPI
     QUADSPI->CCR = tmpreg;
     while (!(QUADSPI->SR & QUADSPI_SR_FTF)) { };

     QUADSPI->AR = addr;
     QUADSPI->DR = data;

     while (!(QUADSPI->SR & QUADSPI_SR_TCF)) { };
     while (QUADSPI->SR & QUADSPI_SR_BUSY) { };
}

STM32 - QSPI - 写入外部存储器IS25LP064

0 个答案: