VHDL程序选择执行哪个操作

时间:2017-04-26 14:14:26

标签: vhdl alu

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
use ieee.numeric_bit.all;
use ieee.numeric_std.all;
entity multiplexer is
port (
    A,B: in std_logic_vector (7 downto 0);
    CI: in std_logic;
    CO: out std_logic;
    ANS: out std_logic_vector (7 downto 0);
    OP: in std_logic_vector(1 downto 0);
    EN: in std_logic);
end multiplexer;

architecture archi of multiplexer is 
    signal tmp: std_logic_vector (8 downto 0);
begin
    process (EN) begin
        if (EN = '1') Then
            case OP is
            when "00" =>
                tmp <= conv_std_logic_vector((conv_integer(A)+conv_integer(B)+conv_integer(CI)),9);
                ANS<= tmp(7 downto 0);
                CO <= tmp(8);
            when "01" =>
                tmp <= conv_std_logic_vector((conv_integer(A)-conv_integer(B)+conv_integer(CI)),9);
                ANS<= tmp(7 downto 0);
                CO <= tmp(8);
            when others => NULL;

            end case;
        else
            NULL;
        end if;
    end process;
end archi;

错误来自第19行。对于中缀运算符没有可行条目&#39; =&#39;还输入错误解析中缀表达式&#34; =&#34;作为类型std.STANDARD.BOOLEAN。我哪里错了? wave output

1 个答案:

答案 0 :(得分:2)

当然:

EN: in std_logic_vector

应该是这样的:

EN: in std_logic

您的错误消息是抱怨没有定义"="运算符,可以将std_logic_vector'1'进行比较,std_logic是{{1}}类型的文字。