STM32 DMA传输错误FIFO和传输错误标志设置

时间:2017-03-25 03:21:38

标签: c stm32 dma stm32f7

我将STM32F769I-EVAL配置为根据ST AN4666的代码接收8位并行数据。我期望发生的是:来自我的输入设备的时钟触发输入捕获DMA并将数据写入SDRAM,直到我的OC定时器中断禁用传输。此时,我可以操纵SDRAM中的数据并将其传输到其他地方。但是,在配置硬件并启用输入捕获后,我会收到DMA传输错误。 HAL_DMA_IRQHandler函数中errorcode(6)的值显示FIFO和传输错误标志都已设置。根据我对datasheet的理解(参见第261页),这应该是不可能的,我认为我在某个地方错误地配置了一个设置,但我不知道如何继续。我可以采取哪些措施来解决这个问题?

DMA配置:

void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim)
{
    GPIO_InitTypeDef   GPIO_InitStruct;
    static DMA_HandleTypeDef  hdma_tim;

    /* TIMx clock enable */
    TIMx_CLK_ENABLE();

    /* Enable DMA clock */
    DMAx_CLK_ENABLE();

    /* Enable TIM input GPIO clock */
    TIMx_CHy_GPIOCLK_ENABLE();

    /* Configure input of TIMx_CHy on AF */
    GPIO_InitStruct.Pin = TIMx_CHy_PIN;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Pull = GPIO_NOPULL;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
    GPIO_InitStruct.Alternate = GPIO_AF_TIMx;
    HAL_GPIO_Init(TIMx_CHy_PORT, &GPIO_InitStruct);

    /* Set the parameters to be configured */
    hdma_tim.Init.Channel  = DMA_CHANNEL;
    hdma_tim.Init.Direction = DMA_PERIPH_TO_MEMORY;
    hdma_tim.Init.PeriphInc = DMA_PINC_DISABLE;
    hdma_tim.Init.MemInc = DMA_MINC_ENABLE;
    hdma_tim.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE ; /* Reading in GPIO PC[7:0]*/
    hdma_tim.Init.MemDataAlignment = DMA_MDATAALIGN_WORD ;
    hdma_tim.Init.Mode = DMA_NORMAL;  /* double memory buffer used */
    hdma_tim.Init.Priority = DMA_PRIORITY_HIGH;
    hdma_tim.Init.FIFOMode = DMA_FIFOMODE_ENABLE; /* using FIFO mode since memory datasize=32bit and GPIO=8bits in our case */
    hdma_tim.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_1QUARTERFULL; /* flushing FIFO at each 32bit reception (4 data) */
    hdma_tim.Init.MemBurst = DMA_MBURST_SINGLE;
    hdma_tim.Init.PeriphBurst = DMA_PBURST_SINGLE;

    /* Set hdma_tim instance */
    hdma_tim.Instance = DMA_STREAM;

    /* Link hdma_tim to hdma[CC1] */
    __HAL_LINKDMA(htim, hdma[TIMx_DMA_ID], hdma_tim);

    /* Initialize TIMx DMA handle */
    HAL_DMA_Init(htim->hdma[TIMx_DMA_ID]);

    /* NVIC configuration for TIMx output compare interrupt */
    HAL_NVIC_SetPriority(TIMx_IRQn, 0, 2);
    HAL_NVIC_EnableIRQ(TIMx_IRQn);

    /* Configure the NVIC for DMA                             */
    /* NVIC configuration for DMA transfer complete interrupt */
    HAL_NVIC_SetPriority(TIMx_DMA_IRQn, 0, 0);
    HAL_NVIC_EnableIRQ(TIMx_DMA_IRQn);

}

主要代码:

/* Initialize SDRAM */
BSP_SDRAM_Init();

/* Configure the Data GPIO in input mode  */
Data_GPIO_Config();

/* Set Timers instance */
TimHandle.Instance = TIMx;

/* Initialize global Timer parameters */
TimHandle.Init.Period            = MAX_COUNTER;
TimHandle.Init.Prescaler         = TIMx_PRESCALER - 1;
TimHandle.Init.ClockDivision     = TIM_CLOCKDIVISION_DIV1;
TimHandle.Init.CounterMode       = TIM_COUNTERMODE_UP;
TimHandle.Init.RepetitionCounter = 0;
if (HAL_TIM_Base_Init(&TimHandle) != HAL_OK)
{
    /* Initialization Error */
    Error_Handler();
}

//Initialize Timer "OC" channel for OC mode
sOConfig.OCMode       = TIM_OCMODE_TIMING/*TIM_OCMODE_TOGGLE*/;
sOConfig.OCPolarity   = TIM_OCPOLARITY_HIGH;
sOConfig.Pulse        = NB_COUNTER_CYCLE;
sOConfig.OCNPolarity  = TIM_OCPOLARITY_HIGH;
sOConfig.OCFastMode   = TIM_OCFAST_DISABLE;
sOConfig.OCNIdleState = TIM_OCNIDLESTATE_RESET;
sOConfig.OCIdleState  = TIM_OCIDLESTATE_RESET;
if (HAL_TIM_OC_ConfigChannel(&TimHandle, &sOConfig, TIMx_CHANNEL_OC) != HAL_OK)
{
    //Configuration Error
Error_Handler();
}

/* Initialize Timer "IC" channel for IC mode     */
sICConfig.ICPolarity  = CLK_LATCHING_DATA_EDGE;
sICConfig.ICSelection = TIM_ICSELECTION_DIRECTTI;
sICConfig.ICPrescaler = TIM_ICPSC_DIV1;
sICConfig.ICFilter    = TIM_IC_FILTER;  /* filter the clock signal over/undershoot */
if (HAL_TIM_IC_ConfigChannel(&TimHandle, &sICConfig, TIMx_CHANNEL_IC) != HAL_OK)
{
    /* Configuration Error */
    Error_Handler();
}

/* Set the DMA memory0 conversion complete callback */
TimHandle.hdma[TIMx_DMA_ID]->XferCpltCallback = TransferComplete;
/* Set the DMA memory1 conversion complete callback */
TimHandle.hdma[TIMx_DMA_ID]->XferM1CpltCallback = TransferComplete;
/* Set the DMA error callback */
TimHandle.hdma[TIMx_DMA_ID]->XferErrorCallback = TransferError ;

/* Update second memory address */
second_mem_address = (uint32_t)((SDRAM_BANK_ADDR + WRITE_READ_ADDR) + (DMA_MEM_BUFF_SIZE));

/* Start DMA multi buffer transfer */
if (HAL_DMAEx_MultiBufferStart_IT(TimHandle.hdma[TIMx_DMA_ID], GPIOx_IDR, (SDRAM_BANK_ADDR + WRITE_READ_ADDR), second_mem_address, DMA_MEM_BUFF_SIZE) != HAL_OK)
{
    /* Transfer Error */
    Error_Handler();
}

__HAL_TIM_ENABLE_DMA(&TimHandle, TIMx_DMA_CC);

/* Enable the TIMx OC channel interrupt */
__HAL_TIM_ENABLE_IT(&TimHandle, TIMx_IT_OC);
/* Enable the TIMX OC channel */
TIM_CCxChannelCmd(TimHandle.Instance, TIMx_CHANNEL_OC, TIM_CCx_ENABLE);

/* Enable the TIMx IC channel */
TIM_CCxChannelCmd(TimHandle.Instance, TIMx_CHANNEL_IC, TIM_CCx_ENABLE);

HAL_TIM_OC_Start(&TimHandle, TIMx_CHANNEL_OC); // enable counter

/* processing while Timeout not reached */
while (timeout_flag == 0);

1 个答案:

答案 0 :(得分:2)

错误是由接收数据时的FIFO溢出条件引起的。将FIFO阈值从1/4增加到完全停止发生传输错误。

cortex-M7引入了数据和指令缓存,可能会导致DMA传输问题,但我可以确认情况并非如此,更多信息here