VHDL：将2D数组的其余部分初始化为零

Question

我目前有这个数组，开头有一些数据，其余的数据为零。我试图使用“其他”命令，但它没有用。

    type data_type is array (0 to n-1) of std_logic_vector(len downto 0); 
    constant data: data_type:=(                     
                                    "00000001",
                                    "00000011",
                                    "00001001",
                                    "00001011",
                                    "00001111",
                                    "00000000",
                                    "00000000",
                                    "00000000"
                                    );

我的尝试：

    type data_type is array (0 to n-1) of std_logic_vector(len downto 0); 
    constant data: data_type:=(                     
                                    "00000001",
                                    "00000011",
                                    "00001001",
                                    "00001011",
                                    "00001111",
                                    (others=> (others=>'0'))
                                    );
--                                          

我收到以下错误：

Type of aggregate cannot be determined without context ; 0 visible types match here