Question

我想初始化一条记录。我已经在线查看了this answer的样式，但我收到了这些错误：

来自Aldec Linter：

编译架构＆＃34; TB_ARCHITECTURE＆＃34;实体＆＃34; ten_gig_filter_tb＆＃34; 错误：COMP96_0079：mgmt_regs_rx_TB.vhd：（97,65）：聚合无效。错误：COMP96_0077：mgmt_regs_rx_TB.vhd：（97,65）：未定义的表达式。预期类型＆＃39; tAPB_IBUS_RECORD＆＃39;。

来自XVHDL Linter：

没有上下文就无法确定
聚合类型; 0个可见类型匹配，32个匹配。

这是我的代码：

-- APB BUS - CPU interface
type tAPB_IBUS_RECORD is record

    pclk        : std_logic;                --APB Clock, all transactions are synced to this clock
    presetn     : std_logic;                --APB active low reset.
    pprot       : std_logic_vector(2 downto 0); --APB protection encoding.
    pselx       : std_logic;            --slave select pin, when asserted, will activate the slave
    penable     : std_logic;            -- Enable pin is asserted by the master after the first clock cycle and consecutively until the 
                                        -- the end of transcation indicated by pready = '1'
    pwrite      : std_logic;            -- APB Write/Read signal - '1' Write with pselx= '1', '0' - Read along with pselx = '1'
    pstrb       : std_logic_vector(3 downto 0); -- Write strobe to enable sparse data transfer on the write bus, 0 - byte lane on pwdata(7-0)
    paddr       : std_logic_vector(19 downto 0); -- 20 bit address bus
    pwdata      : std_logic_vector(31 downto 0); -- 32 bit data bus 
end record;

signal iAPB_BUS_IN         : tAPB_IBUS_RECORD := (
                             pclk => '0', presetn => '0', pprot => (others => '1'),
                             pselx => '1', pwrite => (others => '0'), penable => '1',
                             pstrb => (others => '1'), paddr => (others => '0'),
                             pwdata => (others => '0')
                           );

Answer 1

这是因为这个位错了：

pwrite => (others => '0'),

应该是

pwrite => '0',

因为pwrite的类型为std_logic。

http://www.edaplayground.com/x/5eay

为什么我会得到一个＆＃34;无效的聚合＆＃34;尝试在VHDL中初始化此记录时出错？

1 个答案: