设置关联缓存的缓存命中率:我不理解此图表

时间:2016-07-11 13:37:48

标签: caching memory cpu-architecture

标题可能不是很好,但我找不到更好的标题。

我们做了功课,我没有把它交给我,因为我不理解它。现在因为它结束了,我们得到了解决方案......现在我试图用解决方案来理解任务,因为试图理解我们教授的复杂脚本对我来说是浪费时间。 / p>

任务:

  

我们在main上有以下访问频率的直接映射缓存   内存块:

2 5 0 13 2 5 10 8 0 4 5 2
     

如果缓存为a,则命中引号(又称命中率)是什么   set-associative cache,设置大小为4,FIFO?

my last question about direct-mapped caches开始,我学会了如何计算热门报价,并希望顺便说一句,谢谢你。 我唯一的问题是,我不明白这些数字是如何放在桌子上的。

我认为编程可能:0-3是array1而其他0-3是array2。 我们取第一个缓存数,2并将它放在array1中,因此它在array1 [0]中。然后我们为下一个数字做同样的事情,取5并将它放在array2 [0]中。现在取下一个数字0并放入数组[1]

但是因为看起来这种模式是错误的,所以在表格的第4行之前它是正确的但是那时它是错的...

为什么数字会像表中那样放置?

解决方案:enter image description here

1 个答案:

答案 0 :(得分:4)

You are probably wondering why the numbers don't line up with the addresses, as in the direct mapped case. What is going on in this diagram is that the items are placed into the sets left to right, that is all, because the sets are initially empty. The values 2, 0, 10 and 8 map to the leftmost set. The 2 appears first so it is in the leftmost column. Then 0 is placed in the next available position. 2 occurs again, and that is a "hit" indicated by the parentheses. Then 10 occurs and goes into the third spot. 8 goes to the fourth spot, and the cache block is now full. 0 recurs, and there is a hit, since it is still in the cache, in the second spot. Now 4 occurs. The cache set is full: something has to be kicked out. The 2 is kicked out (possibly due a least-recently-used (LRU) replacement policy) and replaced by 4. That is why the 4 is in the leftmost column; it has replaced the 2. Now 2 occurs again and is no longer in the cache, since it was just kicked out. Now the least recently used cache item is 0, so it is kicked out and 2 now lives in the second spot.

Note that real four-way set-associative caches don't always use a full block-wide LRU replacement policy due to some further simplifications to speed them up.

And, by the way, the addresses are distributed into the sets according to simple modulo 4. It is not the case that even addresses go to the left set and odd to the right:

    set 0             set 1
0   1   2   3  |   0   1   2   3    <-   addr modulo 4
---------------+-----------------
0   1   2   3  |   4   5   6   7    <-   full addr
8   9  10  11  |  12  13  14  15  

As you can see, this is consistent with what is in the table; except of course that the addresses don't match their modulo 4 position: they are given an arbitrary spot in each set based on the replacement policy.