VHDL交通灯

Question

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

entity Traffic_Light is

Port ( clk : in  STD_LOGIC;
       reset : in  STD_LOGIC;
       input : in  STD_LOGIC;
       output : out  STD_LOGIC_VECTOR(1 DOWNTO 0));

end Traffic_Light;

architecture Behavioral of Traffic_Light is

type state_type is (S0,S1,S2);  --type of state machine.
signal present_state, next_state: state_type;  --current and next state declaration.



begin

process 
begin
    wait until clk'event and clk = '0';
    present_state <= next_state;
end process;


process (clk,reset)
begin
    if (reset='1') then
        current_state <= S0;  --default state on reset.
    end if;
end process;


process (present_state, input)
begin

    case present_state is
        when S0 =>                  --when current state is s0
        if(input = '0') then
            output <= "10";
            next_state <= S1;
        else
            output <= "00";
            next_state <= S2;
        end if;


        when S1 =>                  --when current state is s1
        if(input = '0') then
            output <= "01";
            next_state <= S0;
        else
            output <= "00";
            next_state <= S2;
        end if;


        when S2 =>                  --when current state is s2
        if(input = '0') then
            output <= "01";
            next_state <= S0;
        else
            output <= "11";
            next_state <= S2;
        end if;


    end case;
end process;

end Behavioral;

我似乎无法让每个状态改变只发生在时钟的下降沿。

模拟没有显示present state中的各种变化，只是一直显示S0。

已正确输入所有状态更改。它只需要同步复位，状态会在下降沿发生变化。

Answer 1

首先用current_state替换present_state。然后，您无法从两个进程中驱动present_state，因为它不是已解析的类型。你必须做类似

的事情

process (clk,reset)
begin
  if (reset='1') then
    present_state <= S0;  --default state on reset.
  elsif clk'event and clk = '0' then
    present_state <= next_state;  
  end if;
end process;