调试Cortex M3(ARM)嵌入式 - 如何判断从xPSR.ISR运行什么ISR?

时间:2010-07-08 00:06:42

标签: arm embedded cortex-m3

我正在调试arm-family cpu(Cortex M3)上的一个固件。

调试器显示CPU寄存器,包括一个名为'xPSR'的寄存器,其中包含一个名为'ISR'的子字段。 CPU寄存器中的模式是'Mode = Handler',这意味着m3 cpu处于中断处理程序而不是'线程'模式。这就是我所知道的。

我在那里看到字段xPSR.ISR = 15的值。我认为必须是十六进制15(12月21日)。而且我猜这是从查看ISR向量表注释的“系统计时器Tick 0B”中断。实际上,我现在猜测它是15位小数,它是我正在看的SysTick定时器中断处理程序。(注意,因为代码是汇编程序的单行默认处理程序情况,其中大约100个不同的asm标签落在一个地方,从调用ISR的代码中很难说出来。)

然而,我对Cortex M3芯片很陌生,而且我对ARM7TDMI的了解已经因为不使用它而变得褪色,我不记得了。我在任何地方的文档中都找不到这个。

谁能告诉我如何解决这个问题?

1 个答案:

答案 0 :(得分:3)

15号十进制异常是Cortex M3上的SYSTICK中断。

ARM Cortex M3 Technical Reference Manual有一个表(表5-1 - 异常类型),列出了M3使用的各种中断号。

Exception type    Position       Priority       Description
--------------    ------------   --------       ------------------------------------
Reset               1             –3 (highest)  Invoked on power up and warm reset. On first instruction, 
                                                drops to lowest priority (Thread mode). This is asynchronous.
Non-maskable Int    2             –2            Cannot be stopped or pre-empted by any exception but reset. 
                                                This is asynchronous.
Hard Fault          3             –1            All classes of Fault, when the fault cannot activate because of 
                                                priority or the Configurable Fault handler has been disabled. 
                                                This is synchronous.
Memory Management   4             Configurable  Memory Protection Unit (MPU) mismatch, including access 
                                                violation and no match. This is synchronous. This is used 
                                                even if the MPU is disabled or not present, to support the 
                                                Executable Never (XN) regions of the default memory map.
Bus Fault           5             Configurable  Pre-fetch fault, memory access fault, and other 
                                                address/memory related. This is synchronous when precise 
                                                and asynchronous when imprecise.
Usage Fault         6             Configurable  Usage fault, such as Undefined instruction executed or illegal 
                                                state transition attempt. This is synchronous.
  -                 7-10            -           Reserved
SVCall              11            Configurable  System service call with SVC instruction. This is 
                                                synchronous.
Debug Monitor       12            Configurable  Debug monitor, when not halting. This is synchronous, but 
                                                only active when enabled. It does not activate if lower priority 
                                                than the current activation.
  -                 13              -           Reserved
PendSV              14            Configurable  Pendable request for system service. This is asynchronous 
                                                and only pended by software.
SysTick             15            Configurable  System tick timer has fired. This is asynchronous.

External Interrupt  16 and above  Configurable  Asserted from outside the core, INTISR[239:0], and fed 
                                                through the NVIC (prioritized). These are all asynchronous.