Question

我需要找到4点FFT。我需要生成一个可在FPGA中实现的可合成代码。我分三部分完成了这个任务：

包含add，subtract，multiply等函数的包
基数2的蝴蝶结构
顶点模块，即4点FFT

发生以下错误 - 请帮助解决。

library ieee;
    use ieee.std_logic_1164.all;
    use ieee.std_logic_arith.all;
    use ieee.std_logic_signed.all;
    package fft_pkg is   --contains function like add,sub,multiply

       type complex is
             record
              r:std_logic_vector(3 downto 0);
              i:std_logic_vector(3 downto 0);
              end record;
      type comp_array is array (0 to 3) of complex;
       type comp_array1 is array (0 to 2) of complex;
       function add (n1,n2:complex) return complex;
        function sub (n1,n2:complex) return complex;
        function multiply (n1,n2:complex) return complex;   

    package body fft_pkg is 

    --addition of complex numbers
    function add (n1,n2 : complex) return complex is

    variable sum : complex;

    begin 
    sum.r:=n1.r + n2.r;
    sum.i:=n1.i + n2.i;
    return sum;
    end add;

    --subtraction of complex numbers.
    function sub (n1,n2 : complex) return complex is

    variable diff : complex;

    begin 
    diff.r:=n1.r - n2.r;
    diff.i:=n1.i - n2.i;
    return diff;
    end sub;

    --multiplication of complex numbers.
    function mult (n1,n2 : complex) return complex is

    variable prod : complex;

    begin 
    prod.r:=(n1.r * n2.r) - (n1.i * n2.i);
    prod.i:=(n1.r * n2.i) + (n1.i * n2.r);
    return prod;
    end mult;

    end fft_pkg;

    library IEEE;
    use IEEE.STD_LOGIC_1164.ALL;
    library work;
    use work.design.ALL;

    entity butterfly is 
       port(
          s1,s2 : in complex;      --inputs
          w :in complex;      -- phase factor
          g1,g2 :out complex      -- outputs
       );
    end butterfly;

    architecture Behavioral of butterfly is 

    begin 

    --butterfly equations.
    g1 <= add(s1,mult(s2,w));
    g2 <= sub(s1,mult(s2,w));

    end Behavioral;

    library ieee;
    use ieee.std_logic_1164.all;
    library work;
    use work.design.all;
    use work.butterfly.all;

      entity fft4 is 
        port ( 
                input:in complex_array;
                  output :out complx_array
              );
      end fft4;

    architecture rtl of fft4 is

    compnent butterfly is
       port(
          s1,s2 : in complex;      --inputs
          w :in complex;      -- phase factor
          g1,g2 :out complex      -- outputs
       );
    end component;
    signal g1,g2 :comp_array :=(others=>(0000,0000));
    constant w:complex:=((0001,0000),(0000,1111));

    begin
     --first stage of butterfly
    bf11 : butterfly port map(s(0),s(2),w(0),g1(0),g1(1));
    bf12 : butterfly port map(s(1),s(3),w(0),g1(2),g1(3));


    --second stage of butterfly's.
    bf21 : butterfly port map(g1(0),g1(2),w(0),g2(0),g2(2));
    bf22 : butterfly port map(g1(1),g1(3),w(1),g2(1),g2(3));
    end rtl;

错误是：

    ERROR:HDLCompiler:104 - "C:\Users\RObin\fft4\butterfly.vhd" Line 4: Cannot find <design> in library <work>. Please ensure that the library was compiled, and that a library and a use clause are present in the VHDL file.
    ERROR:HDLCompiler:69 - "C:\Users\RObin\fft4\butterfly.vhd" Line 8: <complex> is not declared.
    ERROR:HDLCompiler:69 - "C:\Users\RObin\fft4\butterfly.vhd" Line 9: <complex> is not declared.
    ERROR:HDLCompiler:69 - "C:\Users\RObin\fft4\butterfly.vhd" Line 10: <complex> is not declared.
    ERROR:HDLCompiler:854 - "C:\Users\RObin\fft4\butterfly.vhd" Line 6: Unit <butterfly> ignored due to previous errors.
    ERROR:HDLCompiler:374 - "C:\Users\RObin\fft4\butterfly.vhd" Line 14: Entity <butterfly> is not yet compiled.
    ERROR:HDLCompiler:69 - "C:\Users\RObin\fft4\butte`enter code here`rfly.vhd" Line 19: <g1> is not declared.
    ERROR:HDLCompiler:69 - "C:\Users\RObin\fft4\butterfly.vhd" Line 20: <g2> is not declared.

Answer 1

您的包名为fft_pkg而不是design。 butterfly不是一个包;你不需要把它放在一个使用条款中。

您需要按正确的顺序编译对象 - 您的包，然后是butterfly，然后是fft4。

您的软件包未定义类型complex_array，而是comp_array和comp_array1。

你可能会遇到更多问题，但这些是我第一眼看到的。

FPGA上的FFT实现

1 个答案: