arm-eabi-none不会组装浮点指令

Question

我正在为一个硬件项目编程。我需要为这个项目实现sin，cos，tan，sqrt等。我没有为此项目提供任何标准库，结果必须保留浮点。每当我尝试组装文件（显示在输出下方）时，汇编程序就会给出错误

_core_math_arm.s:30: Error: selected processor does not support ARM mode `fltd f0,r3`
_core_math_arm.s:31: Error: selected processor does not support ARM mode `sindz f0,f0`
_core_math_arm.s:32: Error: selected processor does not support ARM mode `fix r3 ,f0`

我正在与arm-none-eabi-as -o_core_math_arm.bin _core_math_arm.s -march=armv7-a -mcpu=cortex-a5 -mfpu=vfpv4 -mfloat=hard汇总。

所有选项都与我想要的目标处理器匹配。

我从https://launchpad.net/gcc-arm-embedded/+download下载了此工具链。

正在组装的文件如下所示：

    .cpu arm7tdmi
    .fpu softvfp
    .eabi_attribute 20, 1
    .eabi_attribute 21, 1
    .eabi_attribute 23, 3
    .eabi_attribute 24, 1
    .eabi_attribute 25, 1
    .eabi_attribute 26, 1
    .eabi_attribute 30, 6
    .eabi_attribute 34, 0
    .eabi_attribute 18, 4
    .file   "core_math.c"
    .text
    .align  2
    .global sin
    .type   sin, %function
sin:
    @ Function supports interworking.
    @ args = 0, pretend = 0, frame = 8
    @ frame_needed = 1, uses_anonymous_args = 0
    @ link register save eliminated.
    stmfd   sp!, {r4, fp}
    add fp, sp, #4
    sub sp, sp, #8
    str r0, [fp, #-12]
    str r1, [fp, #-8]
    sub r4, fp, #12
    ldmia   r4, {r3-r4}
@ 6 "core_math.c" 1
    fltd f0, r3 
    sindz f0, f0 
    fix r3, f0
@ 0 "" 2
    str r3, [fp, #-12]
    str r4, [fp, #-8]
    sub r4, fp, #12
    ldmia   r4, {r3-r4}
    mov r0, r3
    mov r1, r4
    sub sp, fp, #4
    @ sp needed
    ldmfd   sp!, {r4, fp}
    bx  lr
    .size   sin, .-sin
    .align  2
    .global cos
    .type   cos, %function
cos:
    @ Function supports interworking.
    @ args = 0, pretend = 0, frame = 8
    @ frame_needed = 1, uses_anonymous_args = 0
    @ link register save eliminated.
    stmfd   sp!, {r4, fp}
    add fp, sp, #4
    sub sp, sp, #8
    str r0, [fp, #-12]
    str r1, [fp, #-8]
    sub r4, fp, #12
    ldmia   r4, {r3-r4}
    mov r0, r3
    mov r1, r4
    sub sp, fp, #4
    @ sp needed
    ldmfd   sp!, {r4, fp}
    bx  lr
    .size   cos, .-cos
    .align  2
    .global tan
    .type   tan, %function
tan:
    @ Function supports interworking.
    @ args = 0, pretend = 0, frame = 8
    @ frame_needed = 1, uses_anonymous_args = 0
    @ link register save eliminated.
    stmfd   sp!, {r4, fp}
    add fp, sp, #4
    sub sp, sp, #8
    str r0, [fp, #-12]
    str r1, [fp, #-8]
    sub r4, fp, #12
    ldmia   r4, {r3-r4}
    mov r0, r3
    mov r1, r4
    sub sp, fp, #4
    @ sp needed
    ldmfd   sp!, {r4, fp}
    bx  lr
    .size   tan, .-tan
    .align  2
    .global csc
    .type   csc, %function
csc:
    @ Function supports interworking.
    @ args = 0, pretend = 0, frame = 8
    @ frame_needed = 1, uses_anonymous_args = 0
    @ link register save eliminated.
    stmfd   sp!, {r4, fp}
    add fp, sp, #4
    sub sp, sp, #8
    str r0, [fp, #-12]
    str r1, [fp, #-8]
    sub r4, fp, #12
    ldmia   r4, {r3-r4}
    mov r0, r3
    mov r1, r4
    sub sp, fp, #4
    @ sp needed
    ldmfd   sp!, {r4, fp}
    bx  lr
    .size   csc, .-csc
    .align  2
    .global sec
    .type   sec, %function
sec:
    @ Function supports interworking.
    @ args = 0, pretend = 0, frame = 8
    @ frame_needed = 1, uses_anonymous_args = 0
    @ link register save eliminated.
    stmfd   sp!, {r4, fp}
    add fp, sp, #4
    sub sp, sp, #8
    str r0, [fp, #-12]
    str r1, [fp, #-8]
    sub r4, fp, #12
    ldmia   r4, {r3-r4}
    mov r0, r3
    mov r1, r4
    sub sp, fp, #4
    @ sp needed
    ldmfd   sp!, {r4, fp}
    bx  lr
    .size   sec, .-sec
    .align  2
    .global cot
    .type   cot, %function
cot:
    @ Function supports interworking.
    @ args = 0, pretend = 0, frame = 8
    @ frame_needed = 1, uses_anonymous_args = 0
    @ link register save eliminated.
    stmfd   sp!, {r4, fp}
    add fp, sp, #4
    sub sp, sp, #8
    str r0, [fp, #-12]
    str r1, [fp, #-8]
    sub r4, fp, #12
    ldmia   r4, {r3-r4}
    mov r0, r3
    mov r1, r4
    sub sp, fp, #4
    @ sp needed
    ldmfd   sp!, {r4, fp}
    bx  lr
    .size   cot, .-cot
    .align  2
    .global sqrt
    .type   sqrt, %function
sqrt:
    @ Function supports interworking.
    @ args = 0, pretend = 0, frame = 8
    @ frame_needed = 1, uses_anonymous_args = 0
    @ link register save eliminated.
    stmfd   sp!, {r4, fp}
    add fp, sp, #4
    sub sp, sp, #8
    str r0, [fp, #-12]
    str r1, [fp, #-8]
    sub r4, fp, #12
    ldmia   r4, {r3-r4}
    mov r0, r3
    mov r1, r4
    sub sp, fp, #4
    @ sp needed
    ldmfd   sp!, {r4, fp}
    bx  lr
    .size   sqrt, .-sqrt
    .align  2
    .global invsqrt
    .type   invsqrt, %function
invsqrt:
    @ Function supports interworking.
    @ args = 0, pretend = 0, frame = 8
    @ frame_needed = 1, uses_anonymous_args = 0
    @ link register save eliminated.
    stmfd   sp!, {r4, fp}
    add fp, sp, #4
    sub sp, sp, #8
    str r0, [fp, #-12]
    str r1, [fp, #-8]
    sub r4, fp, #12
    ldmia   r4, {r3-r4}
    mov r0, r3
    mov r1, r4
    sub sp, fp, #4
    @ sp needed
    ldmfd   sp!, {r4, fp}
    bx  lr
    .size   invsqrt, .-invsqrt
    .global __aeabi_dadd
    .align  2
    .global pow
    .type   pow, %function
pow:
    @ Function supports interworking.
    @ args = 0, pretend = 0, frame = 16
    @ frame_needed = 1, uses_anonymous_args = 0
    stmfd   sp!, {r4, fp, lr}
    add fp, sp, #8
    sub sp, sp, #20
    str r0, [fp, #-20]
    str r1, [fp, #-16]
    str r2, [fp, #-28]
    str r3, [fp, #-24]
    sub r1, fp, #20
    ldmia   r1, {r0-r1}
    sub r3, fp, #28
    ldmia   r3, {r2-r3}
    bl  __aeabi_dadd
    mov r3, r0
    mov r4, r1
    mov r0, r3
    mov r1, r4
    sub sp, fp, #8
    @ sp needed
    ldmfd   sp!, {r4, fp, lr}
    bx  lr
    .size   pow, .-pow
    .align  2
    .global ln
    .type   ln, %function
ln:
    @ Function supports interworking.
    @ args = 0, pretend = 0, frame = 8
    @ frame_needed = 1, uses_anonymous_args = 0
    @ link register save eliminated.
    stmfd   sp!, {r4, fp}
    add fp, sp, #4
    sub sp, sp, #8
    str r0, [fp, #-12]
    str r1, [fp, #-8]
    sub r4, fp, #12
    ldmia   r4, {r3-r4}
    mov r0, r3
    mov r1, r4
    sub sp, fp, #4
    @ sp needed
    ldmfd   sp!, {r4, fp}
    bx  lr
    .size   ln, .-ln
    .align  2
    .global log10
    .type   log10, %function
log10:
    @ Function supports interworking.
    @ args = 0, pretend = 0, frame = 8
    @ frame_needed = 1, uses_anonymous_args = 0
    @ link register save eliminated.
    stmfd   sp!, {r4, fp}
    add fp, sp, #4
    sub sp, sp, #8
    str r0, [fp, #-12]
    str r1, [fp, #-8]
    sub r4, fp, #12
    ldmia   r4, {r3-r4}
    mov r0, r3
    mov r1, r4
    sub sp, fp, #4
    @ sp needed
    ldmfd   sp!, {r4, fp}
    bx  lr
    .size   log10, .-log10
    .align  2
    .global logn
    .type   logn, %function
logn:
    @ Function supports interworking.
    @ args = 0, pretend = 0, frame = 16
    @ frame_needed = 1, uses_anonymous_args = 0
    stmfd   sp!, {r4, fp, lr}
    add fp, sp, #8
    sub sp, sp, #20
    str r0, [fp, #-20]
    str r1, [fp, #-16]
    str r2, [fp, #-28]
    str r3, [fp, #-24]
    sub r1, fp, #20
    ldmia   r1, {r0-r1}
    sub r3, fp, #28
    ldmia   r3, {r2-r3}
    bl  __aeabi_dadd
    mov r3, r0
    mov r4, r1
    mov r0, r3
    mov r1, r4
    sub sp, fp, #8
    @ sp needed
    ldmfd   sp!, {r4, fp, lr}
    bx  lr
    .size   logn, .-logn
    .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.9.3 20141119 (release) [ARM/embedded-4_9-branch revision 218278]"

此文件由-S的{​​{1}}选项生成。

指令似乎无法被汇编程序100％正确识别为fpu指令。

提前致谢。