您好我正在使用ISE Xiling构建一个带有verilog的电梯。不幸的是我确实遇到了错误。它说
意外的reg(也是注册)预期的最终模块。
但我确实需要注册。任何人都可能看到错误。
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module user_ctrl
#(parameter FLOORS = 30,
FLOOR_BITS = 5)
(input wire CLK,
input wire RESET,
input wire [(FLOOR_BITS-1):0] CURRENT_FLOOR_IN, // cabin stage
input wire HALTED,
input wire [(FLOORS-1) :0] FLOOR_REQUEST, // floor button pressed
input wire MANUAL_DOOR_CLOSE_IN, // close button pressed
input wire MANUAL_DOOR_OPEN_IN, // open button pressed
input wire MANUAL_ALARM_IN, // alarm button pressed
output wire [(FLOOR_BITS-1):0] CURRENT_FLOOR_OUT, // forward to cabin display
output wire MANUAL_DOOR_CLOSE_OUT, // door close cmd
output wire MANUAL_DOOR_OPEN_OUT, // door open cmd
output wire MANUAL_ALARM_OUT, // user alarm
output wire [(FLOORS-1) :0] DESTINATIONS, // destinations
output reg [(FLOOR_BITS-1):0] CLEAR_FLOOR_BUTTON, // reset_button
output reg CLEAR_FLOOR_BUTTON_VALID); // validate reset_button
/* =============================INSERT CODE HERE======================================*/reg
reg [(FLOOR_BITS-1):0] floor; // sets the register
assign CURRENT_FLOOR_OUT = floor; //allocation of outputs and inputs
assign MANUAL_DOOR_CLOSE_OUT = MANUAL_DOOR_CLOSE_IN;
assign MANUAL_DOOR_OPEN_OUT = MANUAL_DOOR_OPEN_IN;
assign MANUAL_ALARM_OUT = MANUAL_ALARM_IN;
assign DESTINATIONS = FLOOR_REQUEST;
always @ (posedge HALTED)begin //to clear the buttons when elevator is stopped
floor = CURRENT_FLOOR_IN;
CLEAR_FLOOR_BUTTON_VALID = 1;
CLEAR_FLOOR_BUTTON = CURRENT_FLOOR_IN;
end
always @ (negedge HALTED)begin //to let the buttons enlighten when elavator is moving
CLEAR_FLOOR_BUTTON_VALID = 0;
end
/* ====================================================================================*/
endmodule
答案 0 :(得分:2)
从此行末尾删除reg
。变化:
/* =============================INSERT CODE HERE======================================*/reg
为:
/* =============================INSERT CODE HERE======================================*/