我可以为linux内核 3.0.4 编译 PF_RING-5.2.1模块，没有任何问题。对于＆＃34; 3.4.103 ＆＃34;然而，内核出现以下编译错误：
*.../pf_ring.c: In function 'ring_alloc_mem': enter code hereerror: 'SHMLBA' undeclared (first use in this function)
我已经检查了几个SHMLBA的声明/引用 存在于内核模块中，如下所示：
- ./build/ipc/shm.c: if (addr & (SHMLBA-1)) {
- ./build/ipc/shm.c: addr &= ~(SHMLBA-1); /* round down */
- ./build/ipc/shm.c:#ifndef __ARCH_FORCE_SHMLBA
- ./build/drivers/gpu/drm/drm_bufs.c: if (shm && (SHMLBA > PAGE_SIZE)) {
- ./build/drivers/gpu/drm/drm_bufs.c: int bits = ilog2(SHMLBA >> PAGE_SHIFT) + 1;
- ./build/drivers/gpu/drm/drm_bufs.c: /* For shared memory, we have to preserve the SHMLBA
- ./build/drivers/gpu/drm/drm_bufs.c: * Therefore, make sure the SHMLBA relevant bits of the
- ./build/include/linux/shm.h:#define SHM_RND 020000 /* round attach address to SHMLBA boundary */
- ./build/include/asm-generic/shmparam.h:#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
- ./build/arch/sparc/include/asm/shmparam_64.h:#define __ARCH_FORCE_SHMLBA 1
- ./build/arch/sparc/include/asm/shmparam_64.h:#define SHMLBA ((PAGE_SIZE > 1DCACHE_SIZE) ? PAGE_SIZE : L1DCACHE_SIZE)
- ./build/arch/sparc/include/asm/shmparam_32.h:#define __ARCH_FORCE_SHMLBA 1
- ./build/arch/sparc/include/asm/shmparam_32.h:#define SHMLBA (vac_cache_size ? vac_cache_size : \
- ./build/arch/sparc/kernel/sys_sparc_64.c: unsigned long base = (addr+SHMLBA-1)&~(SHMLBA-1);
- ./build/arch/sparc/kernel/sys_sparc_64.c: unsigned long off = (pgoff<<PAGE_SHIFT) & (SHMLBA-1);
- ./build/arch/sparc/kernel/sys_sparc_64.c: unsigned long base = addr & ~(SHMLBA-1);
- ./build/arch/sparc/kernel/sys_sparc_64.c: unsigned long off = (pgoff<<PAGE_SHIFT) & (SHMLBA-1);
- ./build/arch/sparc/kernel/sys_sparc_64.c: ((addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1)))
- ./build/arch/sparc/kernel/sys_sparc_64.c: ((addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1)))
- ./build/arch/sparc/kernel/sys_sparc_32.c:#define COLOUR_ALIGN(addr) (((addr)+SHMLBA-1)&~(SHMLBA-1))
- ./build/arch/sparc/kernel/sys_sparc_32.c: ((addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1)))
- ./build/arch/x86/include/asm/shmparam.h:#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
- ./build/arch/ia64/include/asm/shmparam.h: * SHMLBA controls minimum alignment at which shared memory segments
- ./build/arch/ia64/include/asm/shmparam.h: * To reduce the chance of this, we set SHMLBA to 1MB. --davidm 00/12/20
- ./build/arch/ia64/include/asm/shmparam.h:#define SHMLBA (1024*1024)
- ./build/arch/ia64/kernel/sys_ia64.c: align_mask = SHMLBA - 1;
- ./build/arch/alpha/include/asm/shmparam.h:#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
- ./build/arch/mips/include/asm/shmparam.h:#define __ARCH_FORCE_SHMLBA 1
- ./build/arch/mips/include/asm/shmparam.h:#define SHMLBA 0x40000 /* attach addr a multiple of this */
- ./build/arch/m32r/include/asm/shmparam.h:#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
- ./build/arch/avr32/include/asm/shmparam.h:#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
- ./build/arch/mn10300/include/asm/shmparam.h:#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
- ./build/arch/s390/include/asm/shmparam.h:#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
- ./build/arch/powerpc/include/asm/shmparam.h:#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
- ./build/arch/arm/include/asm/cacheflush.h:#define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
- ./build/arch/arm/include/asm/shmparam.h:#define SHMLBA (4 * PAGE_SIZE) /* attach addr a multiple of this */
- ./build/arch/arm/include/asm/shmparam.h: * Enforce SHMLBA in shmat
- ./build/arch/arm/include/asm/shmparam.h:#define __ARCH_FORCE_SHMLBA
- ./build/arch/arm/mm/copypage-v6.c:#if SHMLBA > 16384
- ./build/arch/arm/mm/mmap.c: unsigned long base = addr & ~(SHMLBA-1);
- ./build/arch/arm/mm/mmap.c: unsigned long off = (pgoff << PAGE_SHIFT) & (SHMLBA-1);
- ./build/arch/arm/mm/mmap.c: ((((addr)+SHMLBA-1)&~(SHMLBA-1)) + \
- ./build/arch/arm/mm/mmap.c: (((pgoff)<<PAGE_SHIFT) & (SHMLBA-1)))
- ./build/arch/arm/mm/mmap.c: * SHMLBA bytes.
- ./build/arch/arm/mm/mmap.c: (addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1))
- ./build/arch/arm/mm/mmap.c: (addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1))
- ./build/arch/xtensa/include/asm/shmparam.h:#define SHMLBA ((PAGE_SIZE > DCACHE_WAY_SIZE)? PAGE_SIZE : DCACHE_WAY_SIZE)
- ./build/arch/parisc/include/asm/shmparam.h:#define __ARCH_FORCE_SHMLBA 1
- ./build/arch/parisc/include/asm/shmparam.h:#define SHMLBA 0x00400000 /* attach addr needs to be 4 Mb aligned */
- ./build/arch/parisc/kernel/cache.c: if (old_addr == 0 || (old_addr & (SHMLBA - 1)) != (addr & (SHMLBA - 1))) {
- ./build/arch/parisc/kernel/sys_parisc.c:#define DCACHE_ALIGN(addr) (((addr) + (SHMLBA - 1)) &~ (SHMLBA - 1))
- ./build/arch/m68k/include/asm/shmparam.h:#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
- ./build/arch/frv/include/asm/shmparam.h:#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
- ./build/arch/sh/include/asm/shmparam.h:#define SHMLBA 0x4000 /* attach addr a multiple of this */
- ./build/arch/sh/include/asm/shmparam.h:#define __ARCH_FORCE_SHMLBA
- ./build/arch/cris/include/asm/shmparam.h:#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
- ./build/arch/unicore32/include/asm/cacheflush.h:#define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
- ./build/arch/h8300/include/asm/shmparam.h:#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
- ./build/mm/vmalloc.c: ret = __vmalloc_node(size, SHMLBA,
- ./build/Documentation/cachetlb.txt:If your D-cache has this problem, first define asm/shmparam.h SHMLBA
此外，所有这些（上面的路径）都涵盖了内核 3.0.4 （我已经设法编译）的内容。
可能有什么不对？任何帮助将不胜感激。