Emacs nXML模式一直在说＆＃34;字节代码：不在＆＃34;当我尝试运行nxml-hide-subheadings时出现错误消息，我不确定原因。
格式化很好，当我运行验证命令时，它告诉我＆＃34;没有更多错误＆＃34;。
我还更新了nxml-section-element-name-regexp和nxml-heading-element-name-regexp以包含应该在我的文件中标题的标记，但这似乎没有改变任何东西。
rng-what-schema命令给出＆＃34;空模式＆＃34;。
nxml-forward / backward-elements运行正常。
根据建议，这是我正在使用的xml文件：
<?xml version="1.0" encoding="UTF-8"?>
<!-- Product Version: Vivado v2014.3 (64-bit) -->
<!-- -->
<!-- Copyright 1986-2014 Xilinx, Inc. All Rights Reserved. -->
<Project Version="7" Minor="2" Path="/home/caiz/dev/PDD/PDD.xpr">
<DefaultLaunch Dir="$PRUNDIR"/>
<Configuration>
<Option Name="Id" Val="cdf7cd0b34644b3fad8429729cc39541"/>
<Option Name="Part" Val="xc7k70tfbg676-1"/>
<Option Name="CompiledLibDir" Val="$PCACHEDIR/compile_simlib"/>
<Option Name="TargetLanguage" Val="VHDL"/>
<Option Name="SimulatorLanguage" Val="VHDL"/>
<Option Name="BoardPart" Val=""/>
<Option Name="ActiveSimSet" Val="data_selector_sim"/>
<Option Name="DefaultLib" Val="xil_defaultlib"/>
</Configuration>
<FileSets Version="1" Minor="31">
<FileSet Name="TX_buffer_sim" Type="SimulationSrcs">
<Filter Type="Srcs"/>
<File Path="$PPRDIR/src/TX_buffer_RAM.vhd">
<FileInfo>
<Attr Name="ImportPath" Val="$PPRDIR/src/TX_buffer_RAM.vhd"/>
<Attr Name="ImportTime" Val="1412826762"/>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PPRDIR/src/TX_buffer_RAM_tb.vhd">
<FileInfo>
<Attr Name="ImportPath" Val="$PPRDIR/src/TX_buffer_RAM_tb.vhd"/>
<Attr Name="ImportTime" Val="1412826762"/>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<Config>
<Option Name="DesignMode" Val="RTL"/>
<Option Name="TopModule" Val="TX_buffer_RAM_tb"/>
<Option Name="TopLib" Val="xil_defaultlib"/>
<Option Name="SimMode" Val="post-implementation"/>
<Option Name="SrcSet" Val=""/>
<Option Name="XSimWcfgFile" Val="$PPRDIR/src/waveform/TX_buffer_RAM_tb_behav.wcfg"/>
</Config>
</FileSet>
</FileSets>
<Simulators>
<Simulator Name="XSim">
<Option Name="Description" Val="Vivado Simulator"/>
</Simulator>
<Simulator Name="ModelSim">
<Option Name="Description" Val="QuestaSim/ModelSim Simulator"/>
</Simulator>
<Simulator Name="IES">
<Option Name="Description" Val="Incisive Enterprise Simulator (IES)"/>
</Simulator>
<Simulator Name="VCS">
<Option Name="Description" Val="Verilog Compiler Simulator (VCS)"/>
</Simulator>
</Simulators>
<Runs Version="1" Minor="9">
<Run Id="synth_1" Type="Ft3:Synth" SrcSet="sources_1" Part="xc7k70tfbg676-1" ConstrsSet="constrs_1" Description="Vivado Synthesis Defaults" State="current" Dir="$PRUNDIR/synth_1">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2014"/>
<Step Id="synth_design"/>
</Strategy>
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
</Run>
<Run Id="impl_1" Type="Ft2:EntireDesign" Part="xc7k70tfbg676-1" ConstrsSet="constrs_1" Description="Vivado Implementation Defaults" State="current" SynthRun="synth_1">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2014"/>
<Step Id="init_design"/>
<Step Id="opt_design"/>
<Step Id="power_opt_design"/>
<Step Id="place_design"/>
<Step Id="post_place_power_opt_design"/>
<Step Id="phys_opt_design"/>
<Step Id="route_design"/>
<Step Id="post_route_phys_opt_design"/>
<Step Id="write_bitstream"/>
</Strategy>
</Run>
</Runs>
</Project>
以下是我所拥有的相关emacs设置，我把它剥离到最低限度：
(custom-set-variables
;; custom-set-variables was added by Custom.
;; If you edit it by hand, you could mess it up, so be careful.
;; Your init file should contain only one such instance.
;; If there is more than one, they won't work right.
'(nxml-heading-element-name-regexp "title\\|head\\|Project\\|Configuration\\|Filesets\\|Fileset\\|Simulators\\|Runs\\|Run")
'(nxml-section-element-name-regexp "article\\|\\(sub\\)*section\\|chapter\\|div\\|appendix\\|part\\|preface\\|reference\\|simplesect\\|bibliography\\|bibliodiv\\|glossary\\|glossdiv\\|Project\\|Configuration\\|Filesets\\|Fileset\\|Simulators\\|Runs\\|Run"))