我在运行makefile时遇到问题,它似乎没有使用我指定的包含路径。 makefile如下所示:
SHELL = /bin/sh
CC = g++
FLAGS = -std=c++0x
CFLAGS = -Wall -fPIC -g -I/include
LDFLAGS = -shared
TARGET = TNet.so
SOURCES = $(shell echo src/*.cpp)
HEADERS = $(shell echo include/*.h)
OBJECTS = $(SOURCES:.cpp=.o)
all: $(TARGET)
$(TARGET): $(OBJECTS)
$(CC) $(FLAGS) $(CFLAGS) $(DEBUGFLAGS) -o $(TARGET) $(OBJECTS)
clean:
-rm *.o $(TARGET
我的目录树如下所示:
rootfolder
/ \
src include
任何想法?
答案 0 :(得分:0)
假设您的Makefile
实际位于rootfolder
下,这是编译器调用的工作目录,您需要指定包含路径不是绝对路径,而是相对< / p>
CFLAGS = -Wall -fPIC -g -I./include
或
CFLAGS = -Wall -fPIC -g -Iinclude
答案 1 :(得分:0)
除非你的项目直接在/
下,否则你应该将-Include
添加到编译器标志
答案 2 :(得分:0)
这Makefile
对我有用:
$ cat Makefile
CPPFLAGS = -Iinclude
CXXFLAGS = -Wall
foo: foo.cpp
$ make foo
g++ -Wall -I/include foo.cpp -o foo
它使用已经定义的implicit rules。在您的情况下,要查找的标志是:
CPPFLAGS
Extra flags to give to the C preprocessor and programs that use it (the C and Fortran compilers).
CXXFLAGS
Extra flags to give to the C++ compiler.