Question

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
entity alu_16 is
    Port ( a : in  STD_LOGIC_VECTOR(15 downto 0);
           b : in  STD_LOGIC_VECTOR(15 downto 0);
           sel : in  STD_LOGIC_VECTOR (1 downto 0);
           gt : out  STD_LOGIC;
           lt : out  STD_LOGIC;
           eq : out  STD_LOGIC;
           result : out  SIGNED(15 downto 0);
           overflow : out  STD_LOGIC;
           cout : in  STD_LOGIC);
end alu_16;

architecture Behavioral of alu_16 is
    signal inter_res : SIGNED(16 downto 0);
    signal subtraction : SIGNED(16 downto 0);
    signal addition : SIGNED (16 downto 0);
    signal carry_in : STD_LOGIC;
    signal carry_out : STD_LOGIC;
    signal msb_bit_add : STD_LOGIC;
begin
    gt <= '1' when a > b else '0';
    lt <= '1' when a < b else '0';
    eq <= '1' when a = b else '0';
    subtraction <= signed(a) - signed(b);
    addition <= signed(a) + signed(b);
    with sel select 
    inter_res <= addition when "00",
                  subtraction when "01",
                 signed(a) AND signed(b) when "10",
                 signed(a) OR  signed(b) when others;
    carry_out <= inter_res(16);
    msb_bit_add <= std_logic(a(15) + b(15));
    carry_in <= msb_bit_add XOR inter_res(15);
    overflow <= NOT(carry_in XOR carry_out);
    result <= inter_res(15 downto 0);




end Behavioral;

所以..我试图在不使用纹波进位加法器的情况下制作一个16位有符号加法器。但是，我在msb_bit_add的一位加载时遇到了重载+运算符的错误。谁能说明我应该在那条线上做些什么呢？

谢谢！

如何正确处理签名号码仍然使用＆＃34; +＆＃34;

0 个答案: