Question

我想在BASYS2上实现一个随机数游戏。在这个游戏中，将选择五个LED，其中一个将随机打开一两秒（此时间可以改变以增加或减少游戏的难度级别）。然后，用户需要在其开启的时间内按下其后面的开关按钮来响应该LED事件。如果他或她能够成功地获得一个积分，那么它将在七段显示器上显示。如果他或她失败，则不会得分。将有9个这样的事件，之后可以重放游戏。

Now following is my code (only for the random LED turning on). However, I am unable to fix it. Please somebody help. The FPGA I am using is BASYS2 SPARTAN 3E-100.

提前感谢所有人。

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_unsigned.ALL;
use IEEE.STD_LOGIC_arith.ALL;

entity random_number is
generic ( width : integer :=  4 ); 
port (
clk : in std_logic;
reset : in std_logic;
random_num : out std_logic_vector (width-1 downto 0)   --output vector            
);
end random_number;

architecture Behavioral of random_number is
signal q: std_logic_vector(23 downto 0);
signal divided_clock: std_logic;
begin
process(clk, reset)
begin
if (reset = '1')then 
q <= X"000000";
elsif(rising_edge(clk)) then
q <= q + 1;
end if;
end process;
divided_clock <= q(22);


process (divided_clock)
variable rand_temp : std_logic_vector(width-1 downto 0):=("1000");
variable temp : std_logic := '0';
begin
if(rising_edge(divided_clock)) then
temp := rand_temp(width-1) xor rand_temp(width-2);
rand_temp(width-1 downto 1) := rand_temp(width-2 downto 0);
rand_temp(0) := temp;
end if;
random_num <= rand_temp;
end process;
end Behavioral;

Answer 1

我认为第二个进程甚至应该使用主clk运行，并且分开的时钟应该是一个启用。

signal divided_enable: std_logic;
process(clk, reset)
begin
if (reset = '1')then 
  q <= X"000000";
elsif(rising_edge(clk)) then
  q <= q + 1;
end if;
if (q(22) = '1') then
  --short pulse wenn q bit 22 is high
  divided_enable <= '1';
  q <= (others => '0');
end if;
end process;


process (clk)
variable rand_temp : std_logic_vector(width-1 downto 0):=("1000");
variable temp : std_logic := '0';
begin
if(rising_edge(clk)) then
  if(divided_enable = '1') then
    temp := rand_temp(width-1) xor rand_temp(width-2);
    rand_temp(width-1 downto 1) := rand_temp(width-2 downto 0);
    rand_temp(0) := temp;
   end if;
 end if;
random_num <= rand_temp;
end process;

我不知道这是否能解决你所有的问题。请描述行为中的编译器错误或错误。

随机LED在VHDL中打开和关闭

1 个答案: